1. Introduction

It is widely accepted that due to its electronics integration capability, proven manufacturing record and price volume curve, Si photonic will be the platform for chip-level interconnect technology [1–4]. Low power consumption and compactness are general requirements for all the optical components to be used in interconnect applications [5]. For this purpose, submicron silicon waveguides, enabling very tight bends down to a few microns, have been widely employed in modulators [6–8], detectors [9-10] and multiplexing devices [11–16]. Nevertheless, such waveguide structures are very sensitive to fabrication tolerance, with a sensitivity figure on the order of 100 GHz/nm (i.e., 1 nm of dimensional error of waveguide cross section results in a wavelength shift of 100 GHz) [5, 17]. Even with electron beam lithography, sub-nm fabrication tolerance cannot be reached. This poses challenges particularly for narrow-bandwidth optical devices.

In order to provide high bandwidth, optical interconnect approaches are likely to exploit wavelength division multiplexing (WDM) techniques. Silicon WDM devices have been demonstrated for Echelle gratings [11-12], arrayed waveguide gratings [13], multiple-stage Mach-Zehnder interferometers (MZI) [14] and cascaded microcavities [15-16]. Since silicon has a very high thermo-optic coefficient (1.86x10⁻⁴ /°C), it is challenging to realize athermal multiplexing devices. In addition, athermal operation limits the application of the thermo-optic effect to compensate the wavelength variation arising from fabrication tolerance. On the contrary, low-power and reconfigurable WDM devices may be realized by exploiting the large thermo-optic effect of silicon. Thermally controlled microcavities are very promising due to their small size and their reconfigurability in both center wavelength and channel spacing. Key challenges, however, include increasing tuning efficiency and reducing thermal crosstalk between adjacent channels. Reported thermally tuned microcavities require a tuning power ranging from 22 to 105 mW for one free spectral range (FSR) tuning [15, 18–22]. The spacing between two adjacent microcavities reported is usually large than 100 µm [15, 16]. In this paper, we demonstrate thermally tuned rings with low power consumption and low thermal crosstalk achieved by taking advantage of thermal isolation trenches close to the ring waveguides. A record-low power of 21 mW is demonstrated to tune one FSR and negligible thermal crosstalk has been found between rings separated by 15 µm. In addition, a tuning time constant less than 10 µs can be realized simultaneously.

2. Design and numerical analysis

Cascaded rings with one common bus waveguide can be constructed as (de)multiplexers, as shown in Fig. 1(a) . Thermally controlled rings can be realized by putting micro-heaters on top of the ring cladding [18–21] or directly heating the ring by doping the silicon waveguide as a resistor [22-23]. In the first method, the heater metal would not induce additional optical loss while the second method would provide faster speed. However, the first method does not require ion implantation and annealing and hence the fabrication process is much simpler. Here we employ metal micro-heaters on top of the ring. The silicon waveguide has a cross section of 0.45 µm x 0.25 µm, with which a ring with a radius of 1.5 µm has been demonstrated [24]. As shown in Fig. 1(b), the buried oxide thickness is 3 µm and the top cladding oxide thickness is 1.2 µm. The heater metal is Ti with a thickness of 100 nm. The heater width is 1 µm, which has been optimized in Refs [18, 21]. A second layer of oxide with a thickness of 0.5 µm is deposit on to top of the Ti heater. More importantly, air trenches beside two sides of the ring waveguide are defined to improve heating efficiency and decrease heating crosstalk. The distance between the trench edge and waveguide edge is 2 µm, far enough for trenches not to disturb the optical mode. The trenches stop at 2 µm in the silicon substrate. Such trenches can be fabricated by dry etch of oxide and silicon.

 

Fig. 1 (a) Cascaded microring resonators to construct (de)multiplexers. (b) Cross section of the ring waveguide proposed to improve tuning efficiency.

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A 2D finite-element method is used to simulate the heating structure. The phase change of the waveguide is related to temperature change ΔT by$\Delta \varphi =\genfrac{}{}{0.1ex}{}{2\pi }{\lambda }L\left(\genfrac{}{}{0.1ex}{}{\partial N_{eff}}{\partial T}\right)\Delta T$, where N_eff is the effective index and L is the waveguide length. A 2π phase change is needed to tune one FSR of the ring. We see in Fig. 2(c) that the tuning power for a 2π phase change is 25 mW and 14 mW for the device without trenches and with trenches, respectively. It is therefore confirmed that the air trenches improve the tuning efficiency by increasing heating confinement in the waveguide regions since the air has very large thermal impedance. We also included a probe waveguide 15 µm away from the original waveguide to simulate thermal crosstalk. The phase change of the probe waveguide as a function of tuning power is shown in Fig. 2(d). If we define the thermal crosstalk as the phase change ratio between those of the second waveguide and the original waveguide, it would be 3.0% for the devices without trenches and 1.5% for the devices with trenches. Hence the air trenches also reduce thermal crosstalk between two adjacent waveguides. It is to be noted that the 2D simulation is only an approximation of the ring structure where the ring radius is large enough. A 3D simulation may be necessary if the ring diameter is less than ~6 µm [22].

 

Fig. 2 (a) and (b) Simulated temperature distribution of the heating structures without (a) and (b) with trenches. (c) Phase change of the silicon waveguide underneath the heater. (d) Phase change for a probe waveguide 15 µm away from the original waveguide.

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3. Device structure and fabrication

The device was fabricated on a silicon-on-insulator (SOI) platform with a 3-µm-thick buried oxide. We patterned the waveguides by electron-beam lithography and etched them by reactive ion etching. We then deposited a 1.2 µm-thick oxide as a cladding layer by plasma enhanced chemical vapor deposition (PECVD). A thin film of Ti (100 nm) was then deposited on the cladding as the heating metal and the heater on the ring was defined by optical lithography and dry etching. Al metal traces ware fabricated to connect the heater metal to the probe pads. A 0.5 µm-thick oxide was deposited as a passivation layer to protect the metals. Last process steps involve trench patterning and dry etching of oxide and silicon to form the trenches. The rings have a racetrack shape with a bending radius of 4 µm and a straight coupling length of 2 µm. The gaps between input/output waveguide and the rings are 0.17 um. Figure 3 shows the tilted top-view scanning electron microscopy (SEM) image of a fully fabricated device with trenches. In this device, the edge-to-edge distance between two rings is 15 um. The distance from the edge of the trenches to the waveguide edges is set as 2 um. Trenches are also formed inside the rings.

 

Fig. 3 Tilted top-view SEM for a fully fabricated two-channel (de)multiplexer. The dashed red lines and blue lines indicate optical pathway and metal pathway.

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4. Testing results

We tested this two-channel multiplexer using an optical spectrum analyzer (OSA) and a tunable laser source together with a voltage-current source-meter. Spectra of two drop ports with different heating powers were collected and shown in Fig. 4 . The heating power was applied on the first ring only. In addition, we fabricated and tested devices without air trenches for comparison purpose. The ring spectra demonstrate an FSR of 19 nm and a quality factor of ~8000 or a 3dB bandwidth of ~0.2 nm. Such bandwidth allows a data transmission rate of 25 Gbps with a power penalty of ~1 dB [25]. From the spectra of drop port 1, we determined the resonant wavelength with different powers and presented the results are presented in Fig. 5 . The linear fitting demonstrates the tuning efficiency is 1.42 mW/nm and 1.10 mW/nm for the device without trenches and with trenches respectively. Considering the FSR of 19 nm, we achieve a tuning power of 27 mW and 21 mW for one FSR tuning for devices without and with trenches, respectively. The tuning power for the device without trenches is close to the simulation (25 mW). For the device with trenches, the experimental power of 21 mW is much larger than the theoretical value of 14 mW. The metal connection on one side of the rings means a large portion of the ring waveguide on this side actually has no air trenches, as shown in Fig. 3. This may explain the power discrepancy between experiment and simulation. Tuning efficiency may be improved by making the trenches closer to the waveguide and making the trenches deeper into silicon substrate.

 

Fig. 4 Spectra with various heating powers. The heating is applied to the first ring. Spectra of drop port 1 (a) and port 2 (b) without trenches; Spectra of drop port 1 (c) and port 2 (d) with trenches.

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Fig. 5 Resonance shift versus heating powers.

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The measured resonance shift of the second ring while heating the first ring demonstrates negligible thermal crosstalk between two rings separated by 15 µm. From Fig. 4(d), we found that for the device with trenches, the resonance shift of the second ring is less than 0.03 nm while that of the first ring is 7.75 nm, resulting in a thermal crosstalk of less than 0.5%. This thermal crosstalk is lower than the simulated result due to the fact that most of the waveguides of the two rings are separated by more than 15 µm.

We measured the tuning speed for the devices with the trenches by driving the heater with a 20 kHz square-wave voltage signal, as shown in Fig. 6 . The input wavelength is set at the resonance of the ring. Exponential fits of the optical output of the drop port shows a time constant of 9 µs and 6 µs for the rise edge and the fall edge respectively.

 

Fig. 6 Temporal response of the ring in the drop port.

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5. Discussion and conclusion

Table 1 summarizes the tuning power for previously reported thermally tuned microring resonators and the device reported here. As tuning efficiency highly depends on the FSR or the size of the resonator, it is more reasonable to compare the tuning power per FSR shift rather than the tuning efficiency in order to compare the heater efficiency (in certain applications, however, the tuning efficiency may be more important in that the tuning range is only part of the FSR). The reported tuning power for metal heaters ranges from 35 mW to 105 mW per FSR tuning. Compared with these devices, our devices have a reduced tuning power at least 40% by taking advantages of air trenches. Ref [22]. reported direct heating of the resonator by doping the silicon waveguide as a resistor. While our heating power is comparable to that in Ref [22], the metal heater is much easier to make without any ion implantation and annealing processes.

Table 1. Tuning power comparison of previously demonstrated thermally tuned silicon microrings and the device presented in this work.

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In conclusion, we demonstrate thermally reconfigurable multiplexing devices based on silicon microring resonators with low tuning power (21 mW per FSR) and negligible thermal crosstalk for rings separated by 15 µm. Compared with other types of silicon WDM devices such as grating based and MZI based, thermally tuned cascaded microrings have two important advantages. First, since each ring can be controlled individually, they are reconfigurable in both center wavelengths and channel spacing. Second, mircorings are far more compact. As demonstrated in this work, a 15 µm spacing is sufficient to avoid thermal crosstalk between two adjacent rings. Assume we use rings with a diameter of 5 µm, the area of one channel would be only 20 µm by 20 µm. This area is almost two orders smaller than that of other types of WDM devices. In addition, the total areas of cascaded rings linearly depend on the channel number, while other types of WDM have an area requirement usually proportional to the square of the channel number. However, thermally tuned microrings may consume more power and require advanced control circuits in applications. If we assume a 5 nm wavelength tuning is required to compensate the resonance variation from fabrication and temperature tolerance and a tuning efficiency of 0.5 mW/nm for a 5 µm-diameter ring (this tuning efficiency has been achieve in Ref [22]. and also in our device, scaling down the ring radius), the tuning power would be 2.5 mW for one channel. This tuning power would add 100 fJ/bit for a data rate of 25 Gbps in an optical link. This power/energy consumption may be acceptable in optical interconnect applications [5].