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Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes [Invited]

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Abstract

Integrating photonics with advanced electronics leverages transistor performance, process fidelity and package integration, to enable a new class of systems-on-a-chip for a variety of applications ranging from computing and communications to sensing and imaging. Monolithic silicon photonics is a promising solution to meet the energy efficiency, sensitivity, and cost requirements of these applications. In this review paper, we take a comprehensive view of the performance of the silicon-photonic technologies developed to date for photonic interconnect applications. We also present the latest performance and results of our “zero-change” silicon photonics platforms in 45 nm and 32 nm SOI CMOS. The results indicate that the 45 nm and 32 nm processes provide a “sweet-spot” for adding photonic capability and enhancing integrated system applications beyond the Moore-scaling, while being able to offload major communication tasks from more deeply-scaled compute and memory chips without complicated 3D integration approaches.

© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

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Figures (7)

Fig. 1
Fig. 1 The comparison of fT for IBM/GlobalFoundries CMOS processes. [8–10]
Fig. 2
Fig. 2 45nm SOI CMOS process cross-section with relevant devices [From Sun et al., JSSC. 50, 893 (2016)].
Fig. 3
Fig. 3 “Zero-change” SOI platform evolution; (a) Development timeline, (b) EOS22 die photo, (c) WDM transceivers, (d) Key photonic devices of an optical link.
Fig. 4
Fig. 4 (a) 3D layout of a unidirectional grating coupler, (b) Optical transmission at 10.5 degree vertical angle.
Fig. 5
Fig. 5 (a) 3D layout of a spoked-ring modulator [From Moazeni et al., JSSC. 52, 3503 (2017)], (b) Optical transmission of a WDM transmitter row with 11 channels (numbers indicate channel ordering) over 3.2 THz FSR from EOS24 chip. Channel 3’s heater is turned on by 20% strength to show the individual resonance tuning functionality.
Fig. 6
Fig. 6 Photodetectors in “zero-change” platforms: (a) PMOS cross-sections in 45nm and 32nm processes and their features used for O-band light detection, (b) 3D layout of a resonant SiGe PD, (c) and (d) Micrograph and cross-section of the defect-based resonant PD for L-band.
Fig. 7
Fig. 7 40 Gb/s NRZ and PAM4 transmitters results: (a) Micrograph of the 40 Gb/s NRZ transmitter, (b) Total area and energy breakdown for 40 Gb/s transmitter, eye-diagram, NRZ (c) NRZ (d) PAM4 eye-diagram.

Tables (3)

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Table 1 Summary and comparison of non-monolithic silicon photonic platforms.

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Table 2 Summary and comparison of monolithic silicon photonic platforms.

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Table 3 Photonic devices performance summary.

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