Abstract
We design and fabricate a series of broadband silicon arbitrary power splitters with various split ratios using shortcuts to adiabaticity. In this approach, the system evolution is designed using the decoupled system states, and the desired split ratios are guaranteed by the boundary conditions. Furthermore, the system evolutions are optimized to be as close to the adiabatic states as possible, thus enhancing the robustness to wavelength and fabrication variations. The devices are more compact then the conventional adiabatic designs. Fabricated devices show broadband response for a wide wavelength range from 1.47 to 1.62 µm and also have excellent robustness against fabrication errors across an 8-inch wafer.
© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Photonic integrated circuits (PICs) attract a great amount of attentions because of their low packaging costs, high performance, and small size. Applications such as interconnects [1,2] and lattice filters [3,4] have been demonstrated in the past. The arbitrary ratio power splitter is one of the significant building blocks in PICs [5,6]. Recently, many types of arbitrary ratio power splitters have been developed. Directional couplers (DCs) [7,8] are a popular architecture to obtain arbitrary ratio power splitters because of their compactness and relative ease of fabrication. However, DCs usually suffer from sensitivity to wavelength and fabrication errors. Directional couplers with phase control can achieve low wavelength sensitivity [9], however, the phase control sections require precise fabrication. Multimode interference (MMI) couplers have been utilized to realize arbitrary ratio power splitters due to their compactness and excellent fabrication tolerance [10–13], but MMIs still struggle with wavelength dependency and higher excess loss. Adiabatic couplers have excellent bandwidth and robustness to fabrication errors [14–16], but in general, they need long device lengths to satisfy the adiabatic criterion. There have also been significant developments in subwavelength grating (SWG) based silicon photonics devices [17,18], and the SWG structures have been applied to arbitrary power splitters with small footprints and broadband characteristics [19,20]. The SWG based devices benefit from the ability to engineer optical properties through subwavelength structures and are thus more demanding in fabrication.
Shortcuts to adiabaticity (STA) [21], originally developed in the context of quantum control, have been proposed to accelerate adiabatic passages. Owing to the analogies between quantum mechanics and wave optics [22], we can manipulate light propagation in optical waveguides using the protocols developed for quantum mechanics. Many waveguide devices based on STA have been proposed [23–29], and these devices have characteristics of broadband, large fabrication tolerance, and compactness. In STA, the invariant based inverse engineering allows the design of system evolution using the decoupled system state, and the desired output is guaranteed by the boundary conditions at any device lengths [30,31]. Recently, a scheme to optimize system adiabaticity in coupled waveguide devices using inverse engineering has been proposed [32]. The concept has been applied to mode (de)multiplexing, beam splitting, and polarization manipulation devices in silicon [33–35]. In this inverse engineering based optimization approach, the system evolution is designed to be as close to the adiabatic state as possible, thus enhancing the robustness to wavelength and fabrication variations. In this paper, a series of broadband arbitrary power splitters using STA with split ratios (bar/cross) of 50%/50%, 60%/40%, 70%/30%, 80%/20%, 90%/10% are designed and fabricated on the silicon-on-insulator (SOI) platform. The lengths of the fabricated power splitters with split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, 90%/10% are 83 µm, 73 µm, 57 µm, 46 µm, and 36 µm, respectively; and for a wide wavelength range from 1.47 to 1.62 µm, the measured split ratios at the output ports are 47∼57%/43∼53%, 51∼65%/35∼49%, 61∼69%/31∼39%, 71∼81%/19∼29%, and 80∼90%/10∼20%, respectively. The devices also show uniform performance across an 8-inch wafer, indicating good fabrication tolerance.
2. Inverse engineering based STA
The theory is applicable in general to weakly-coupled waveguide structures described by the coupled mode theory. Here we consider two weakly-coupled silicon waveguides (waveguide 1 and waveguide 2) placed closely, as shown in Fig. 1. We set the z-axis as the propagation direction, and the waveguide spacing D(z) (center-to-center) and the widths W1 and W2 of waveguides are allowed to vary along z. Light is coupled into the device at z = 0 and out at z = L.
The changes in the guided-mode amplitudes [A1, A2]T along the z-axis are described by the coupled-mode equation as
The state evolution may be parameterized according to one of the decoupled states $|{\Psi _z^ + } \rangle $ and $|{\Psi _z^ - } \rangle $ in Eq. (2). Here, we use $|{\Psi _z^ - } \rangle $ to design a 50%/50% beam splitter for a device of length L as an example. The initial state of the system is set as $|{\Psi _z^ - (0 )} \rangle $ = [1,0]T (the input light is launched into waveguide 1) with initial boundary conditions θ(0) = 0 and ϕ(0) = π/2, and the final state is set as $|{\Psi _z^ - (L )} \rangle $ [√0.5, √0.5]T to ensure the desired 50%/50% split ratio. We choose a smooth function satisfying the boundary conditions [36]:
Next, to design power splitters with different split ratios, we simply adjust the parameter P in Eq. (4) to engineer the final state $|{\Psi _z^ - (L )} \rangle $ to achieve the desired split ratios. In this work, we design power splitters with split ratios (bar/cross) of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10%, and the corresponding P parameters are listed in Table 1.
The resulting θ(z)’s and ϕ(z)’s are shown in Figs. 2(a) and 2(b). The splitting ratio (output boundary condition) is determined by θ(z), and ϕ(z) determines how close the trajectory is to the ideal adiabatic path. Their corresponding coupling coefficients Ω(z)’s and mismatches Δ(z)’s are obtained inversely from Eq. (3) and shown in Figs. 3(a) and 3(b). We can see that the resulting system parameters are smooth functions.
Figure 4 shows the trajectories of the designed system evolutions for power splitters with split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20% and 90%/10% on the surface of the Bloch sphere, and the black curve is the ideal adiabatic trajectory. The trajectories all start from the north pole and terminate on different latitudes, corresponding to different split ratios. We can find that the designed trajectories using inverse engineering based optimization evolve closely to the adiabatic trajectory along the process. We also note that these trajectories can be brought even closer to the adiabatic trajectory. However, this leads to a smaller waveguide separation which could be challenging in fabrication.
3. Device design and simulations
In this work, an SOI rib waveguide which has a 220-nm-high rib with a 110-nm-high slab and a 3-µm-thick buried oxide layer is used for device design, and the cladding layer is silica, as shown in Fig. 1, and the default waveguide widths W1 = W2 = 500 nm. An exponential relation between the coupling coefficient Ω(z) and the waveguide spacing D(z) can be obtained from coupled-mode theory [40]; and following [41], a linear relation between the mismatch Δ(z) and the width difference δW = W1-W2 can also be obtained:
Finally, the corresponding waveguide parameters, waveguide spacing D(z) and waveguide widths W1(z) and W2(z) can be obtained by inverse engineering via the relations in Fig. 5. In order to satisfy the limitation of the fabrication process, the minimum of gap between two waveguides is set to be 200 nm. Therefore, the length L’s of the power splitters are chosen as 83 µm, 73 µm, 57 µm, 46 µm, and 36 µm for split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20% and 90%/10%, respectively [the minima of D(z) depends on L]. Further reduction of the device length not only decreases the gap between the waveguides but also increases the curvature of waveguides, leading to excess loss that will impact device performance. The calculated waveguide spacing D(z) and waveguide widths W1(z) and W2(z) as a function of the length of power splitters are shown in Figs. 6 and 7. The resulting waveguide parameters are smooth functions without abrupt steps. Power splitters using inverse engineering based optimization with various power splitting ratios can thus be simulated and fabricated with these device parameters.
Next, we employ the EME method to simulate the power splitters with splits ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10%. The devices are simulated at a wavelength of 1.55 µm and the TE polarization. Figure 8 shows the simulated light distribution in the power splitters designed using STA. And we can find that light power is split into the output ports with the designed ratios.
4. Fabrication and measurement
The power splitters using inverse engineering based optimization STA were implemented on an 8-inch SOI wafer using a CMOS-compatible process with ArF 193-nm deep ultraviolet lithography. Figure 9 shows the scanning electron microscope (SEM) images of the fabricated devices, and the lengths of the fabricated 50%/50%, 60%/40%, 70%/30%, 80%/20%, 90%/10% power splitters are 83 µm, 73 µm, 57 µm, 46 µm, 36 µm, respectively. The waveguides at the input and the output of power splitters are sufficiently separated so that coupling is negligible. In the fabricated devices, S-bends are attached to the input and the output of power splitters. For device characterization, a pair of edge couplers with a coupling efficiency of 40.9% for the TE polarization are utilized for optical input/output between lensed single-mode fiber and silicon chip. The spectral response of the power splitter is characterized by sweeping the wavelength of the incident light using a tunable laser with a step resolution of 1 pm.
The left column of Fig. 10 shows typical measured spectra when light is launched into the top waveguide (the transmission has been normalized), and we can see that for a wide wavelength range from 1.47 µm to 1.62 µm, the split ratios (bar/cross) at the output ports are 47∼57%/43∼53%, 51∼65%/35∼49%, 61∼69%/31∼39%, 71∼81%/19∼29% and 80∼90%/10∼20% for the power splitters with designed split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10%, respectively. We also launched light into the bottom waveguide and measure the spectra of power splitters. In this case, the other decoupled state $|{\Psi _z^ + } \rangle $ in Eq. (2) is excited. The initial state of the system can be written as $|{\Psi _z^ + (0 )} \rangle $ = [0,1]T, and the same boundary conditions lead to the same exact split ratios as using the top input (using $|{\Psi _z^ - (L )} \rangle $). The right column of Fig. 10 shows typical measured spectra when light is launched into the bottom waveguide (the transmission has been normalized), and we can see that for a wide wavelength range from 1.48 µm to 1.62 µm, the split ratios (bar/cross) at the output ports are 46∼59%/41∼54%, 53∼61%/39∼47%, 61∼72%/28∼39%, 70∼82%/18∼30%, and 80∼89%/11∼20% for the power splitters with designed split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10%, respectively. From Fig. 10, we can see that as-fabricated power splitters exhibit a broadband response covering over 150 nm of wavelength (1.47 µm to 1.62 µm), which is limited by the wavelength range of the tunable laser. The excess losses of the devices are evaluated by comparing the total transmission of the beam splitters with that of a reference straight waveguide to eliminate the losses due to edge couplers. We obtained average excess losses of <0.15 dB for the power splitters.
We also measured the transmission spectra of eight 50%/50% splitters on different locations across the 8-inch wafer with an estimated fabrication variation (thickness, width, etch depth) of ±10 nm. The results are shown in Fig. 11. We can observe that the devices across the wafer all show broadband response close to the designed 50%/50% ratio. At 1550 nm, these devices exhibit split ratios of 48∼57%/43∼53% as shown in Table 2. These results indicate excellent fabrication tolerance of the power splitters using inverse engineering based optimization.
Table 3 shows a comparison of the inverse engineering based STA power splitters with the state-of-the-art arbitrary ratio power splitters [9,11–13,15,20]. The main advantages of the STA based power splitters are the bandwidth and the fabrication tolerance. By finding shortcuts to adiabaticity, the devices are more compact then the conventional adiabatic designs [15] while maintaining the robustness.
5. Conclusion
In summary, a series of broadband silicon arbitrary power splitters with split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10% using inverse engineering based optimization have been designed and fabricated. By invariant based inverse engineering, the system evolution is designed using the decoupled system state, and the desired output is guaranteed by the boundary conditions at any device lengths. We further optimize the system evolution to be as close to the adiabatic state as possible to enhance the bandwidth and fabrication tolerance. Devices with split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10% at lengths of 83 µm, 73 µm, 57 µm, 46 µm, and 36 µm are fabricated and characterized. For a wide wavelength range from 1.47 to 1.62 µm, the split ratios at the output ports are 47∼57%/43∼53%, 51∼65%/35∼49%, 61∼69%/31∼39%, 71∼81%/19∼29% and 80∼90%/10∼20% for the power splitters with designed split ratios of 50%/50%, 60%/40%, 70%/30%, 80%/20%, and 90%/10%, respectively. The power splitters also show excellent robustness against fabrication variations across an 8-inch silicon wafer.
Funding
Ministry of Science and Technology, Taiwan (106-2221-E-110-060-MY3, 108-2218-E-110-011, 108-2218-E-992-302, 108-2221-E-006-204-MY3).
Disclosures
The authors declare no conflicts of interest.
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