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Fabrication and transmission of optical polymer waveguide backplane for high - performance computers

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Abstract

In this paper, a high-speed, large-capacity and compact optical backplane architecture for high-performance computers (HPC) is proposed and designed. The MT couplers is designed without additional mirror to divert the light from vertical cavity surface emitting laser (VCSEL) array by 90°. The light is then coupled into the optical waveguide through the MT. A bidirectional 8 channels polymer optical waveguide array with low insertion loss is designed and fabricated. The waveguides are embedded in the printed circuit board. We test the performance of 8 channels for the optical waveguide backplane. In the entire optical backplane, the averaged insertion loss of optical backplane with 50 μm input fiber is 1.62 dB with 850 nm VCSEL. The misalignment loss is 0.5 dB when the misalignment between waveguide and multi-mode fiber is 8.5 μm. Then, the transmission performances of 4 channels with different speed signals is demonstrated by off-line experiment. The optical backplane network can achieve 15 G data error-free transmission in the range of [-2 dBm, -10 dBm] received optical power (ROP). Based on VCSEL arrays, the optical interconnection network system can achieve 8 channels parallel signal transmission. In the optical backplane, the 10 Gbit / s data generated / processed by field programmable gate array (Xilinx Kintex-7) chips can realize error-free transmission. In large-capacity, high-speed parallel HPC, the designed optical backplane system can facilitate the establishment of a large number of parallel transmissions.

© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

Over the years, the increase in the demand and utilization of Internet service bandwidth has placed increasing demands on the bandwidth and processing capabilities of HPC in data centers. HPCs need high-bandwidth and high-speed communication systems to increase the communication capacity of commodity servers (or compute nodes) [1,2]. Optical technology supports the growth of HPC performance in high-performance computers [3]. This technology is expected to achieve high-bandwidth data transmission, high-density wiring, and low power consumption. In fact, the top-ranked HPCs in the TOP500 [4] have deployed multimode fiber (MMF) links in their rack-to-rack and board-to-board interconnects [5]. Therefore, the next question is how to achieve on-board communication and on-chip communication, as close as possible to the LSI (large-scale integrated circuit) chip. Therefore, high-bandwidth, high-speed optical printed circuit board networks are essential for high-performance computing [6,7].

HPCs require higher bandwidth density, lower latency, compact size and lower power consumption [8]. The optical communication network on the board is an alternative technology that can meet the requirements of high-speed and high-bandwidth parallel processing of computer systems [9]. In order to realize the high-bandwidth data transmission network on the board, the performance improvement of the transmitter (light source), coupling interface, optical channel and detector (photodiode) is very important. For transceivers, vertical cavity surface emitting lasers (VCSELs) are the light source of choice for such applications. They have the following advantages: low power operation, high optical output power (> 1 mW), large bandwidth (> 20 GHz), low cost without any light source temperature control and large array configuration production [10,11]. Because VCSELs are widely deployed in MMF links, VCSELs emitting at 850 nm are used as light sources on O-PCBs [12]. The on-board optical engine based on VCSEL has realized data transmission up to 672 Gbit/s (28 Gb/s × 24 chs) to increase the speed of the communication system [13]. In order to achieve efficient transmission of high-speed optical backplane, an efficient and convenient coupler is needed. In [14], an ingeniously structured coupler is designed to achieve efficient transmission of C bands and L bands. A waveguide coupler is designed to improve the coupling efficiency of the coupler and facilitate large-area manufacturing [15]. This design has high coupling efficiency. However, this design can only be used for coupling between waveguides, not for interface coupling. Therefore, a high-efficiency coupler using a lens is proposed to improve the coupling efficiency and reduce the process requirements [1618]. For transmission channels and coupling interfaces, multimode (MM) polymer waveguides are an attractive technology for implementing cost-effective board-level optical links owing to their favorable optical and material properties and large dimensions that allow low loss transmission at the data communication wavelength range and direct integration onto standard printed circuit boards (PCBs) with relaxed alignment tolerances [1922]. Therefore, a great deal of effort has been invested to develop step-index (SI) polymer optical waveguides using conventional photolithographic methods [2326]. What is worrying is that the mode field and contour mismatch between SI square core and graded index (GI) round core will lead to high coupling loss [27,28]. Therefore, a polymer optical waveguide based on the Mosquito method is manufactured to achieve low-loss optical coupling through a 45-degree mirror [29,30]. A number of system demonstrators have recently been reported to implement large on-board integrated interconnect capabilities by deploying large arrays of high-speed VCSELs and parallel MMP waveguides [20,21]. On a 1-meter-long MMP circle waveguide, no return zero-inverse (NRZ) data transmission is tested [31]. As far as we know, the existing technology is to demonstrate inter-board [19,20,28], waveguide interconnection systems [18,31] and optical board simulation system [32]. However, there are more or less shortcomings in these articles: in terms of optical backplane research, the focus is on the design of components (optical waveguides or coupling interfaces), but there are fewer studies on optical backplane. Among them, the research on optical backplane mainly focuses on manufacturing and transmission losses, and there is less research on transmission performance and research is offline experiment verification. Simultaneously, most of the optical waveguide links are demonstrated without embedding in the circuit board, and the stability and practicability are not high. In order to achieve a highly integrated and high-bandwidth inter-chip optical communication network, a large number of faster-speed on-board optical links need to be deployed. As a result, the cost of optical interconnects has become an important component of HPC network costs.

In this article, we design and manufacture an 8-path optical backplane system to meet the bandwidth requirements between HPC processors. We design and fabricate a waveguide array and a coupler. We test the insertion loss and misalignment loss of the optical backplane system. Then, the performance of the Xilinx Kintex-7 chips generating / processing 10 Gbit/s data network is verified. In the optical backplane network, high-speed 15 G bandwidth data can realize error-free transmission. In large-capacity, high-speed parallel computer data centers, the optical backplane system designed can facilitate the establishment of a large number of parallel HPCs.

2. Operation principle

2.1 Optical interconnect layer PCB board production

The material of intermediate layer in the multilayer printed circuit board is FR4, and the formation technology of the optical waveguide interconnection layer has been studied. Figure 1(a) is the schematic diagram of high-speed communication between 4 chips in an HPC and Fig. 1(b) is the fabricated optical backplane system. The optical network consists of TXs/RXs and an optical backplane system. The optical backplane consists of a 1 × 8 parallel optical waveguide arrays, and MT coupling interface. As shown in Fig. 1(a), the yellow area in the optical backplane is a schematic diagram of the optical waveguide embedded in the circuit board. The gray frame in Fig. 1(a) and the blue frame in Fig. 1(b) are the area of the optical backplane. We embed the waveguide in the multi-layer circuit board. The optical waveguide is used to connect the MT coupler. The green area in Fig. 1(a) is the schematic diagram of an MT coupler, which is used to couple a modulated optical signal into an optical waveguide. The white areas in Fig. 1(b) are waveguides in the designed optical backplane. The red areas in Fig. 1(b) are the MT couplers at the transmitter and receiver respectively. One MT coupler is embedded in the circuit board and connected to the optical waveguide to achieve a 90° turn of modulated light. The other MT coupler is used to couple waveguide and output the light signals from the optical waveguide. High-speed signals are generated by chips (Xilinx Kintex-7 chips / arbitrary waveform generator (AWG)). As shown in Fig. 1(a), the chip is a signal processing chip. The yellow area in Fig. 1(b) is Xilinx Kintex-7 chips, which are used to generate and process high-speed electrical signals. Optical signals are modulated by VSCEL. The VCSEL laser unit is driven and controlled by a laser driving circuit to realize electrical/optical conversion. In Fig. 1, TX / RX is a schematic of VSCEL / PIN. In actual production, we use 10 G QSFP to modulate and demodulate high-speed digital electrical signals. The optical signals emitted by the VCSEL arrays are directly coupled to the optical waveguide layer of the EOPCB board through the MT optical coupling interface. The optical receiver PIN is coupled through the MT optical coupling interface, and then the signal realizes the optical / electrical conversion. The converted electrical signal is then input to the Xilinx Kintex-7 chips or digital sampling oscilloscope (DSO) for processing. The communication capacity of the entire optical interconnection network depends on the transmission rate of the VCSEL and the degree of parallelism in the HPC. Figure 1(b) is the fabricated optical backplane system.

 figure: Fig. 1.

Fig. 1. (a) Schematic diagram of chip-to-chip high-speed optical waveguide backplane in HPC, (b) Optical communication backplane system.

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2.2 Waveguide fabrication in optical backplane

In a multimode polymer optical waveguide optical interconnection layer, the thickness of the core layer is about several tens of microns. Therefore, special molds for core layers need to be made. The SU-8 series negative photoresist is used as the core material of the optical waveguide mold, and the SU-8 optical waveguide pattern mold is formed by a doctor blade method, photolithography and other processes. The manufacturing process of the mold generally includes glass substrate cleaning, coating with SU8 glue, homogenization, pre-baking, exposure, medium baking, development, and solid mold. The glass substrate is cleaned to ensure the adhesion of the SU8 glue to the substrate. Applying SU8 glue on the substrate should be performed under blue or red light to ensure no dust bubbles. The pre-baking is divided into two processes of low temperature 70 °C and high temperature 110 °C. The middle baking process is similar to the pre-baking process. During the development process, the unexposed parts will fall off. The clamping process enhances adhesion and corrosion resistance. The groove of the mold is 70 × 50 μm2. The mold protrusion is 250 × 50 μm2.

After the mold is manufactured, the manufactured mold needs to be tested, which is mainly performed on the step meter. We choose the size of the lithography tank to meet the design specifications for waveguide fabrication. The optical waveguide is manufactured by a doctor blade method, which has the advantage of obtaining a large-area polymer optical waveguide layer. The method can directly apply the polymer optical waveguide material as an intermediate layer of a multilayer PCB board on the FR4 board. The process conditions are compatible with the conventional PCB process, which is convenient for low-cost production. The entire manufacturing process of the waveguide is shown in Fig. 2. It mainly includes six steps: mold making, core material filling, doctor blade leveling, under cladding production, adhesive extraction, and over cladding production. Black is the substrate. Gray is SU-8 glue, which has good adhesion to silicon and metal oxides. Brown material is polydimethylsiloxane polymer (PDMS). Blue material is the cladding material on PDMS. Yellow material is release glue. Green material is the cladding material under PDMS.

 figure: Fig. 2.

Fig. 2. Process flow chart of waveguide.

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Multi-mode optical waveguide core layers and coatings are made from low loss polysiloxane polymer materials. The preparation technology of polymer multimode optical waveguide layer materials is studied. Under certain pressure and speed conditions, the doctor blade method can obtain the core layer and cladding optical waveguide film layer with the required thickness. The core layer and cladding of the optical waveguide are manufactured by a doctor blade method. The refractive index of the optical waveguide core layer is 1.43. The cladding has a refractive index of 1.41. The optical transmission loss is 0.08 dB / cm. The polymer optical waveguide arrays contain 8 optical waveguides. The core layer spacing is 250 μm. The cross section of the core wire is approximately 70 × 50 μm2. The length of these waveguides is 5 cm. The upper cladding layer and the lower cladding layer have a thickness of about 150 μm2. Figure 3 shows the three-dimensional view of the optical waveguide and the photomicrograph of a top view of the optical waveguide. The measurement result of the cross-section profile of polymer waveguide core layer by Wyko NT1100 optical profiling system is shown in Fig. 4. The thickness of the polymer light waveguide cores is about 50 μm. Figure 4 is the test results of the cross-sectional profile of the core layer of the polymer optical waveguide. Figure 5 is the images of polymer optical waveguide arrays.

 figure: Fig. 3.

Fig. 3. (a) Three-dimensional view of the optical waveguide, (b) top photomicrograph of the optical waveguide.

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 figure: Fig. 4.

Fig. 4. The test results of the cross-sectional profile of the core layer of the polymer optical waveguide.

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 figure: Fig. 5.

Fig. 5. (a) Photo of three groups of polymer optical waveguide arrays, (b) enlarged photo of the surface of the optical waveguide core.

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2.3 Coupler fabrication in optical backplane

The waveguide is embedded in the circuit board. The improved MT connector with an end face of 45° is used as the coupling device with waveguide layer. The vertical MT connector is ground to a 45° end face together with the pre-inserted optical fiber. The designed horizontal waveguide is coupled with the vertical MT connector though the 45° end face. Figure 6(a) is the cross-sectional view of an improved MT coupler embedded in the optical backplane. The right side of Fig. 6(a) is the color description table in the figure. From top to bottom are over cladding, waveguide, under cladding and circuit board. Among them, the gray is the package of the MT coupler. Yellow is the coated 45° fiber end face array. Figure 6(b) is the simplified three-dimensional diagram. Orange is waveguide. Yellow is the coated 45 ° fiber end face in the MT coupler. White is the fixed interface of the MT coupler. Gray is the package of the MT coupler.

 figure: Fig. 6.

Fig. 6. (a) Cross-sectional view of the MT coupler, (b) three-dimensional view of the MT coupler.

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Normally, incident optical signals are coupled to the parallel optical waveguide array in the PCB via the MT-compatible coupler. Anti-reflection coating (AR coating) is coated on the 45° reflection surface of the MT coupling interface. At the same time, the focusing effect of the fiber cylindrical surface during vertical coupling can effectively reduce the coupling loss. The 45° fiber end face of 45° MT is completely exposed and will not be affected by the curing adhesive. The ferrule wall at the 45° fiber end face of MT is about 0.6 mm. The length, width and height of the MT coupling interface are 9 mm, 6.4 mm and 2.5 mm, respectively. The fiber alignment error of the connector can reach 0.5 μm, and the optical loss mainly occurs at the 45° total reflection surface. Figure 7 is the images of the MT connection coupler with a 45° end face (a: top view; b: front view). The distance between optical channels is 250 μm, and the positioning accuracy reaches 0.5 μm.

 figure: Fig. 7.

Fig. 7. Photo of the MT connection coupler with a 45 ° end face (a: top view; b: front view).

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3. Characterization for square-core polymer waveguides backplane

As shown in Fig. 8(a), it is the test block diagram of the insertion loss of channels in the backplane. The 850 nm multimode laser is used as the light source. The connection between the 850 nm multimode laser and the optical backplane is connected through a 50 μm multimode fiber. The input/output of the optical backplane are 62.5 μm multimode fibers. The 50 μm multimode fiber is connected to the optical backplane through a fiber optic flange coupler (FOFC). The receiving end obtains the optical power through an optical power tester. As shown in Fig. 8(b), it is the loss graph of the entire optical path. The insertion loss of a 50 μm multimode fiber is 0.2 dB. The insertion loss of a light source after passing through a 62.5 μm fiber is 0.59 dB. The insertion loss of the light source after passing through the polymer waveguide backplane (PWB) is 2.26 dB. The insertion loss of the entire optical path is 2.54 dB.

 figure: Fig. 8.

Fig. 8. (a) Block diagram of the test of insertion loss of channel in the backplane. (b) Loss diagram of the entire optical path.

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The insertion loss test results for the 8 channels in the optical backplane are shown in Fig. 9. The insertion loss measurement of 8-channel including waveguide, coupler, and two 62.5 μm fibers. When the 850 nm light source and the optical backplane are connected through a 50 μm core fiber, the insertion loss of the 8 optical paths in the optical backplane is about 2.3 dB. In the experiment, the average insertion loss of 62.5 μm fiber is about 0.34 dB. When the 850 nm laser is connected to the optical backplane through a 50 μm core fiber, the insertion loss of the optical backplane is 1.62 dB. Crosstalk between the optical paths is low than -50 dB and negligible.

 figure: Fig. 9.

Fig. 9. Insertion test results of 8 channels in the optical backplane.

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Figure 10 shows the misalignment loss curve at connection point 2 in Fig. 8(b). The measure of misalignment loss is between 50 / 62.5 μm fibers and MT coupler. First, we fix the optical backplane on a two-dimensional adjustment platform. And the 50 / 62.5 μm interface is fixed on a five-dimensional adjustment platform. Measurement of misalignment loss is achieved by adjusting the five-position adjustment platform. We select the x-axis of the adjustment platform for measurement. The accuracy of the five-position adjustment platform is 0.1 μm. Then, the misalignment error is adjusted to realize the test experiment of misalignment loss by moving the misalignment position of 50 / 62.5 μm. The vertical axis is the normalized received power. The horizontal axis is the offset center distance. The red curve is a conventional 50 μm core fiber with MT coupler and optical backplane misalignment connection insertion loss test. The -0.5 dB tolerance width of the red curve is 8.5 μm.

 figure: Fig. 10.

Fig. 10. Normalized received power vs. misalignment loss.

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4. High-bandwidth processing performance

Figure 11 illustrates the setup for a high-speed optical backplane transmission experiment. The baseband data is generated by a 60 GSa / s Keysight-Agilent M9502A mainframe. The optical signal is generated by a VCSEL with a bandwidth of 18 GHz and then transmitted to the optical backplane through the MT coupler. At the receiving end, the optical signal is received through an 18 GHz bandwidth MMF PIN. Sampling is performed by an 80 GSa / s high-speed (sampling) oscilloscope. After sampling, the data is down-sampled. Data is recovered by least mean square (LMS) equalizer.

 figure: Fig. 11.

Fig. 11. Experimental system diagram of optical backplane system. (AWG: arbitrary waveform generator, OS: optical switch, DSO: digital sampling oscilloscope).

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As shown in Fig. 12, experimental performance curve of 4 channels is under the low-speed 5 Gbit/s signals. Figure 12(a) is a performance chart of the optical channel 1. In the case of the received optical power range [-2 dBm, -10 dBm], channel 1 can achieve transmission performance with a bit error rate of 0. The figure shows the eye diagram of the signal when the ROP is -3 dBm and -10 dBm, respectively. The eye diagram is of good quality. As for channels 2, 3, and 4, the transmission performance of the optical path can be tested for error-free transmission. The quality of the eye diagrams is good.

 figure: Fig. 12.

Fig. 12. Experimental performance curves of low-speed 5Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4. Figure 13. Experimental performance curves of high-speed 15Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4.

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As shown in Fig. 13, the experimental performance curve is for high-speed 15 Gbit / s signals. Figure 13(a) is a performance diagram of the optical channel 1. In the case of the received optical power range [-2 dBm, -10 dBm], channel 1 can achieve transmission performance with a bit error rate of 0. The figure shows the eye diagram of the signal when the ROP is -3 dBm and -10 dBm, respectively. The eye diagrams are of good quality. As for channels 2, 3, and 4, the transmission performance of the optical path can be tested for error-free transmission. The quality of the eye diagrams is good. Therefore, the designed optical backplane can achieve high bandwidth and high rate transmission performance.

 figure: Fig. 13.

Fig. 13. Experimental performance curves of high-speed 15Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4.

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5. Real-time processing performance

We built an experimental demonstration system platform. The system platform includes a Xilinx Kintex-7 signal processing board, a quad small form-factor pluggable (QSFP), a parallel optical waveguide board, and a 1 × 8 MT coupling module, as shown in Fig. 14. In an optical backplane system, a pseudo-random bit sequence (PRBS) signal generated by a Xilinx Kintex-7 chip is directly modulated by QSFP through a serial communication protocol to achieve electrical-optical conversion and transmission to an optical network. In optical networks, MT-compatible coupling interfaces are used for the vertical coupling of optical signals between QSFP and waveguides. The communication channel is a 1 × 8 parallel waveguide array. The VCSEL array has 8 ports, of which four are data transmitting ends and four ports are data receiving ends. The data transmission rate of each port is 10 Gbit / s and the wavelength are 850 nm. At the receiving end, the Xilinx Kintex-7 chip receives and stores electrical signals, and then performs digital signal processor (DSP) processing and error analysis. Optical transmission networks can be used to route high-speed and large-capacity data in HPCs, and can also be made into EOPCB optical interconnect boards, which facilitates the integration of circuits and waveguides.

 figure: Fig. 14.

Fig. 14. Xilinx Kintex-7 chip real-time experiment demonstration system platform in optical backplane.

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The optical backplane performance test chart is shown in Fig. 15. We test the performance of back-to-back (BtoB) and waveguides in optical backplanes. There are little performance differences between the four channels. The optical backplane system can realize the error free transmission at the ROP of -9 dBm. Figure 16 shows the Xilinx Kintex-7 real-time processing results of the four channels in the optical backplane. When the received bit count reaches 1010, the error count of the receivers is 0. The manufactured optical backplane can be used in HPCs to realize large bandwidth and large capacity optical communication transmission.

 figure: Fig. 15.

Fig. 15. Transmission performance test chart of 4 channels in the optical backplane.

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 figure: Fig. 16.

Fig. 16. FPGA real-time processing results of 4 channels in the optical backplane

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6. Conclusions

This research proposes and designs an optical network architecture solution for HPC high-speed and large-capacity data transmission. We design and manufacture bidirectional 8 channel optical waveguides and MT coupler. We test the coupling efficiency of 50 / 62.5 μm core fiber at 850 nm wavelength. We measure the misalignment coupling efficiency of 50 / 62.5 μm and coupler. The designed optical backplane has a transmission loss of 1.62 dB. In the optical network, the optical backplane network that Xilinx Kintex-7 chip generates / processes 10Gbit / s data can realize error-free transmission. Then, we verify the transmission performance of 4 channels of 5 / 15 Gbit / s signals. The entire optical backplane network can achieve error-free transmission, in the range of [-2 dBm, -10 dBm] ROP. Based on a VCSEL array, the optical interconnection network system can realize 8 channel parallel transmission. The optimal bit error rate for channel transmission can reach error-free transmission. In large-capacity, high-speed parallel computer HPCs, the designed optical network system can be used as a data transmission hub, thereby promoting the establishment of a large number of parallel HPCs.

Funding

National Natural Science Foundation of China (61471179); China Postdoctoral Science Foundation (2018M642843).

Disclosures

All authors: NGIA, SOEI, HUST.

The authors declare no conflicts of interest.

References

1. A. Kushwaha, T. Das, and A. Gumaste, “Does it Make Sense to put Optics in Both the Front and Backplane of a Large Data-Center,” OFC M3K.3 (2017).

2. J. J. Liu, K. L. Chi, C. C. Wei, T. C. Lin, C. Y. Chuang, X. N. Chen, J. W. Shi, and J. Chen, “High Bit-Rate Distance Product of 128 Gbps/km 4-PAM Transmission over 2-km OM4 fiber Using an 850-nm VCSEL and a Volterra Nonlinear Equalizer,” OSA / OFC W3G.5 (2017).

3. Y. Cheng, M. Fiorani, R. Lin, L. Wosinska, and J. Chen, “POTORI: A Passive Optical Top-of-Rack Interconnect Architecture for Data Centers,” J. Opt. Commun. Netw. 9(5), 401–411 (2017). [CrossRef]  

4. http://www/top500.org/

5. A. Benner, “Optical interconnect opportunities in super computers and high end computing,” OFC, Otu2B4 (2012).

6. R. Dangel, J. Hofrichter, F. Horst, D. Jubin, A. L. Porta, N. Meier, I. M. Soganci, J. Weiss, and B. J. Offrein, “Polymer waveguides for electro-optical integration in data centers and high-performance computers,” Opt. Express 23(4), 4736–4750 (2015). [CrossRef]  

7. Q. Hu, D. Che, Y. Wang, and W. Shieh, “Advanced modulation formats for high-performance short-reach optical interconnects,” Opt. Express 23(3), 3245–3259 (2015). [CrossRef]  

8. C. Isabella, C. J. Alain, D. S. Matthew, R. Rosula, C. Piero, and A. Nicola, “Simulation and FPGA-Based Implementation of Iterative Parallel Schedulers for Optical Interconnection Networks,” J. Opt. Commun. Netw. 9(4), C76–C87 (2017). [CrossRef]  

9. T. Barwicz, Y. Taira, S. Takenobu, N. Boyer, A. J. Polczynski, Y. Thibodeau, S. Kamlapurkar, S. Engelmann, H. Numata, R. L. Bruce, S. Laflamme, P. Fortier, and Y. A. Vlasov, “Optical Demonstration of a Compliant Polymer Interface between Standard Fibers and Nanophotonic Waveguides,” OFC, Th3F.5 (2015).

10. N. Bamiedakis, J. L. Wei, J. Chena, P. Westbergh, A. Larsson, R. V. Penty, and I. H. White, “56 Gb/s PAM-4 Data Transmission Over a 1 m Long Multimode Polymer Interconnect,” in CLEO, STu4F.5 (2015).

11. H. Wang, J. Qiu, X. Yu, M. Feng, and N. Holonyak, “85°C Operation of 850 nm VCSELs Deliver a 42 Gb/s Error-Free Data Transmission for 100 meter MMF Link,” OSA / OFCW1l.6 (2018).

12. Y. Morimoto and T. Ishigure, “Design for polymer optical waveguides realizing efficient light coupling via 45-degree mirrors 56 Gb/s PAM-4 Data Transmission Over a 1 m Long Multimode Polymer Interconnect,” Opt. Express 27(8), 10839–10853 (2019). [CrossRef]  

13. H. Nasu, K. Nagashima, T. Uemura, A. Izawa, and Y. Ishikawa, “>1-Tb/s on-board optical engine for highdensity optical interconnects,” in OSA/OFC, W1A.4 (2017).

14. Z. Pan, H. Subbaraman, Y. Zou, X. Xu, X. Zhang, C. Zhang, and R. T. Chen, “Quasi-vertical tapers for polymer-waveguide-based interboard optical interconnects,” Photonics Res. 3(6), 317–323 (2015). [CrossRef]  

15. R. T. Chen, L. Lin, C. Choi, Y. J. Liu, B. Bihari, L. Wu, and J. Bristow, “Fully embedded board-level guided-wave optoelectronic interconnects,” Proc. IEEE 88(6), 780–793 (2000). [CrossRef]  

16. C. Choi, L. Lin, Y. Liu, J. Choi, L. Wang, D. Haas, and R. T. Chen, “Flexible optical waveguide film fabrications and optoelectronic devices integration for fully embedded board-level optical interconnects,” J. Lightwave Technol. 22(9), 2168–2176 (2004). [CrossRef]  

17. X. Wang, W. Jiang, L. Wang, H. Bi, and R. T. Chen, “Fully embedded board-level optical interconnects from waveguide fabrication to device integration,” J. Lightwave Technol. 26(2), 243–250 (2008). [CrossRef]  

18. X. Lin, A. Hosseini, X. Dou, H. Subbaraman, and R. T. Chen, “Low-cost board-to-board optical interconnects using molded polymer waveguide with 45 degree mirrors and inkjet-printed micro-lenses as proximity vertical coupler,” Opt. Express 21(1), 60–69 (2013). [CrossRef]  

19. M. A. Taubenblatt, “Optical Interconnects for High-Performance Computing,” J. Lightwave Technol. 30(4), 448–457 (2012). [CrossRef]  

20. K. Schmidtke, F. Flens, A. Worrall, R. Pitwon, F. Betschon, T. Lamprecht, and R. Krahenbuhl, “960 Gb/s Optical Backplane Ecosystem Using Embedded Polymer Waveguides and Demonstration in a 12G SAS Storage Array,” J. Lightwave Technol. 31(24), 3970–3975 (2013). [CrossRef]  

21. F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-Class Optical PCB Links Incorporating 360-Gb/s Bidirectional 850 nm Parallel Optical Transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012). [CrossRef]  

22. M. Immonen, J. Wu, H. J. Yan, L. X. Zhu, P. Chen, and T. Rapala-Virtanen, “Development of electro-optical PCBs with embedded waveguides for data center and high performance computing applications,” Proc. SPIE 8991, 899113 (2014). [CrossRef]  

23. M. Hikita, S. Tomaru, K. Enbutsu, N. Ooba, R. Yoshida, M. Usai, T. Yoshida, and S. Imamura, “Polymeric optical waveguide films for short-distance optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 5(5), 1237–1242 (1999). [CrossRef]  

24. R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for Datacom application,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008). [CrossRef]  

25. R. C. A. Pitwon, K. Wang, J. Graham-Jones, I. Papakonstantinou, H. Baghsiahi, B. J. Offrein, R. Dangel, D. Milward, and D. R. Selviah, “FirstLight: Pluggable optical interconnect technologies for polymeric electrooptical printed circuit boards in data centers,” J. Lightwave Technol. 30(21), 3316–3329 (2012). [CrossRef]  

26. S. Yang, L. Yang, F. Luo, B. You, Y. Ni, and D. Chen, “Multi-Node All-Optical Interconnect Network Routing for Data-Center Parallel Computers,” IEEE Photonics J. 11(2), 1–8 (2019). [CrossRef]  

27. M. Immonen, M. Karppinen, and J. K. Kivilahti, “Fabrication and characterization of polymer optical waveguides with integrated micromirrors for three-dimensional board-level optical interconnects,” IEEE Trans. Electron. Packag. Manuf. 28(4), 304–311 (2005). [CrossRef]  

28. Y. Morimoto and I. Takaaki, “Low-loss light coupling with graded-index core polymer optical waveguides via 45-degree mirrors,” Opt. Express 24(4), 3550–3561 (2016). [CrossRef]  

29. K. Soma and T. Ishigure, “Fabrication of a graded-Index circular-core polymer parallel optical waveguide using a microdispenser for a high-density optical printed circuit board,” IEEE J. Sel. Top. Quantum Electron. 19(2), 3600310 (2013). [CrossRef]  

30. S. Daisuke and I. Takaaki, “Fan-in/out polymer optical waveguide for a multicore fiber fabricated using the mosquito method,” Opt. Express 23(2), 1585–1593 (2015). [CrossRef]  

31. N. Bamiedakis, J. Chen, P. Westbergh, J. S. Gustavsson, A. Larsson, R. V. Penty, and I. H. White, “40 Gb/s Data Transmission over a 1 m Long Multimode Polymer Spiral Waveguide,” in ECOC, 1–2 (2014).

32. P. Maniotis, N. Terzenidis, and A. Siokis, “Application-Oriented On-Board Optical Technologies for HPCs,” J. Lightwave Technol. 35(15), 3197–3213 (2017). [CrossRef]  

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Figures (16)

Fig. 1.
Fig. 1. (a) Schematic diagram of chip-to-chip high-speed optical waveguide backplane in HPC, (b) Optical communication backplane system.
Fig. 2.
Fig. 2. Process flow chart of waveguide.
Fig. 3.
Fig. 3. (a) Three-dimensional view of the optical waveguide, (b) top photomicrograph of the optical waveguide.
Fig. 4.
Fig. 4. The test results of the cross-sectional profile of the core layer of the polymer optical waveguide.
Fig. 5.
Fig. 5. (a) Photo of three groups of polymer optical waveguide arrays, (b) enlarged photo of the surface of the optical waveguide core.
Fig. 6.
Fig. 6. (a) Cross-sectional view of the MT coupler, (b) three-dimensional view of the MT coupler.
Fig. 7.
Fig. 7. Photo of the MT connection coupler with a 45 ° end face (a: top view; b: front view).
Fig. 8.
Fig. 8. (a) Block diagram of the test of insertion loss of channel in the backplane. (b) Loss diagram of the entire optical path.
Fig. 9.
Fig. 9. Insertion test results of 8 channels in the optical backplane.
Fig. 10.
Fig. 10. Normalized received power vs. misalignment loss.
Fig. 11.
Fig. 11. Experimental system diagram of optical backplane system. (AWG: arbitrary waveform generator, OS: optical switch, DSO: digital sampling oscilloscope).
Fig. 12.
Fig. 12. Experimental performance curves of low-speed 5Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4. Figure 13. Experimental performance curves of high-speed 15Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4.
Fig. 13.
Fig. 13. Experimental performance curves of high-speed 15Gbit / s rate signals: (a) channel 1, (b) channel 2, (c) channel 3, (d) channel 4.
Fig. 14.
Fig. 14. Xilinx Kintex-7 chip real-time experiment demonstration system platform in optical backplane.
Fig. 15.
Fig. 15. Transmission performance test chart of 4 channels in the optical backplane.
Fig. 16.
Fig. 16. FPGA real-time processing results of 4 channels in the optical backplane
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