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In this paper we propose and experimentally demonstrate a reconfigurable 10Gbps frequency-encoded (1D) encoder/decoder structure for optical code division multiple access (OCDMA). The encoder is constructed using a single semiconductor optical amplifier (SOA) and 1D reflective Opto-VLSI processor. The SOA generates broadband amplified spontaneous emission that is dynamically sliced using digital phase holograms loaded onto the Opto-VLSI processor to generate 1D codewords. The selected wavelengths are injected back into the same SOA for amplifications. The decoder is constructed using single Opto-VLSI processor only. The encoded signal can successfully be retrieved at the decoder side only when the digital phase holograms of the encoder and the decoder are matched. The system performance is measured in terms of the auto-correlation and cross-correlation functions as well as the eye diagram.
©2008 Optical Society of America
1. Introduction
Over the recent years, optical code-division multiple-access (OCDMA) systems have been investigated for access networks and have received significant attention for their ability to increase the number of active users and provide multiple-user access over the same bandwidth. Various OCDMA implementation techniques have been proposed including direct-sequence encoding [1], frequency encoding [2–4], spectral phase encoding [5], spectral amplitude coding [6], two-dimensional (2D) encoding [7] and hybrid coding approaches [8]. Among OCDMA systems, Frequency Encoded (FE)OCDMA deserves close attention because FE codes matched with different detection schemes suppress the multiple-access interference (MAI) that is inherently present in OCDMA systems.
Most frequency encoding OCDMA coding designs have so far been based on using optical filters, such as Fiber Bragg Gratings (FBG). However, OCDMA systems based on FBG of fixed Bragg wavelengths require N-1 encoders for each user (N is number of users in the network) as well as an optical switch to select the proper encoder. The FBGs that can be tuned in real time makes such OCDMA systems impractical because it limits the flexibility, accuracy, and variety of the encoding/decoding operation [9].
Recently, we have demonstrated a SOA-based tunable laser that can be tuned via an Opto-VLSI processor [10]. In this paper, we build on this structure to experimentally demonstrate the concept of a 10Gb/s FE-OCDMA encoder/decoder, where codewords are generated through the use of computer-generated digital phase holograms loaded onto the Opto-VLSI processor.
One of the main advantages of the implementation of OCDMA in access networks and LAN is its transparency to the network topology. However, the encoder and the decoder of OCDMA systems are crucial components that require special attention. This is because each network node is typically assigned a unique code that must accurately be recognised by the decoder, while the encoder must have the capability to encode data to any particular user with minimum user interference (MUI).
An Opto-VLSI processor comprises an array of liquid crystal (LC) cells driven by a Very-Large-Scale-Integrated (VLSI) circuit that generates digital holographic diffraction gratings to steer and/or shape optical beams [11–13], as illustrated in Fig. 1(a). Each pixel is assigned a few memory elements that store a digital value, and a multiplexer that selects one of the input voltages and applies it to the aluminum mirror plate. An Opto-VLSI processor is electronically controlled, software-configured, polarization independent, cost effective because of the high-volume manufacturing capability of VLSI chips as well as the capability of controlling multiple optical beams simultaneously, and very reliable since beam steering is achieved with no mechanically moving parts [11–13]. These attractive features make the Opto-VLSI technology attractive for reconfigurable optical networks.
Figure 1(a) also shows a typical layout of the Opto-VLSI processor. Indium-Tin Oxide (ITO) is used as the transparent electrode, and evaporated aluminum is used as the reflective electrode. By incorporating a thin quarter-wave plate (QWP) layer between the liquid crystal and the VLSI backplane, a polarization-insensitive Opto-VLSI processor can be realized, allowing optical beam steering with polarization-dependent loss as low as 0.5 dB as reported by Manolis, et al. [14]. The ITO layer is generally grounded and a voltage is applied at the reflective electrode by the VLSI circuit below the LC layer to generate stepped blazed gratings for optical beam steering [11–13].
Figures 1(b)–1(d) illustrates the steering capability of an Opto-VLSI processor of pixel size d, driven by blazed gratings [Fig. 1(b)] which correspond to phase holograms [Fig. 1(c)]. If the pitch of the blazed grating is q×d, (where q is number of pixels per pitch), the optical beam is steered by an angle θ that is proportional to the wavelength, λ, of the light and inversely proportional to q×d, as shown in Fig. 1(d). A blazed grating of arbitrary pitch can be generated using LabView software by digitally driving a block of LC pixels with appropriate phase levels by changing the voltage applied to each pixel, so the incident optical beam is dynamically steered along arbitrary directions. The maximum diffraction efficiency of an Opto-VLSI processor depends on the number of discrete phase levels that the VLSI can accommodate [11–13].
Fig. 1. (a). Opto-VLSI processor and LC cell structure design.(b) phase level versus pixel number for blazed grating synthesis, (c) corresponding steering phase holograms of the various pixel blocks, and (d) principle of beam steering using an Opto-VLSI processor.
2. FE-OCDMA encoder/decoder structure
The proposed FE-OCDMA encoder/decoder structure shown in Fig. 2 is based on the use of SOA as a gain medium and an Opto-VLSI processor as tunable optical filters. The broadband amplified spontaneous emission (ASE) generated by the SOA is collimated and launched to a diffractive grating plate that spreads the wavelength components of the collimated ASE along different directions and maps them onto the active window of the Opto-VLSI processor. Optimized computer-generated digital holograms are loaded onto the Opto-VLSI to independently steer the incident wavelengths components along arbitrary directions. Each wavelength component incident onto the Opto-VLSI processor is assigned a pixel block loaded with an optimized digital phase hologram so that the optical power falling on that pixel block is independently either reflected back along its incident optical path and hence coupled into the fibre collimator with minimum attenuation, or appropriately steered off-track, so its power is not coupled back into the fibre collimator, thus a codeword can be generated. The coupled wavelengths are injected back into the SOA to be amplified and modulated using Electro-optic modulator (EOM), the encoded signal is then transmitted into the network.
At the receiver side, the encoded signal is routed to a fibre collimator and the collimated optical beam is launched towards a diffraction grating plate, which spreads the wavelength components along different directions and maps them onto the active window of the decoding Opto-VLSI processor. It is important to note that in order to retrieve back the original signal, the 2nd Opto-VLSI processor must be loaded with digital phase holograms similar to those of the first Opto-VLSI processor. The decoded signal is coupled back into the fibre collimator and routed through an optical circulator to photoreceiver. When the digital phase holograms of the encoder and decoder are matched, a high-peak auto-correlation waveform is generated, which can be recognised using a threshold detector. Otherwise, a low-amplitude cross-correlation function is generated, indicating a mismatch between the codewords of the encoder and the decoder.
3. Experiment setup
The SOA used in this experiment was an off-the-shelf SOA manufactured by Qphotonics. Fig. 3(a) shows the experiment set up and Fig. 3(b) shows the ASE spectrum of the SOA. The SOA was driven by a Newport modular controller model 8000 at a driving current of 400 mA. The broadband ASE generated by the SOA, shown in Fig. 3, was collimated using a 1-mm-diameter fibre collimator, and the collimated beam was launched onto a 1200 lines/mm diffractive grating plate. The latter spread the wavelength components of the collimated beam along different directions and mapped them onto the active window of the Opto-VLSI processor. Both Opto-VLSI processors used in this experiment were one-dimensional having 1×4096 pixels and 256 phase levels, with 1µm pixel size, and 0.8 µm dead spacing between each pixel. Labview software was used to generate optimized digital holograms that independently steer the incident wavelength components along arbitrary directions.
Fig. 3. Photograph of the encoder setup used to demonstrate the principle of the FE-OCDMA structure. (b) ASE spectrum generated by the SOA. Driving current=400 mA.
To demonstrate the principle of the proposed FE-OCDMA encoder/decoder structure, codewords were generated using five wavelengths out of eight equal-power hopping wavelengths namely λ1=1528.6nm, λ2=1529.2nm, λ3=1529.8nm, λ4=1530.2nm, λ5=1530.9nm, λ6=1531.6nm, λ7=1532.1nm, and λ8=1532.8nm. The first Opto-VLSI processor was configured to generate a codeword employing λ1, λ2, λ4, λ5, and λ8, therefore, these wavelengths were coupled back into the collimator, and substantially attenuated (steered away) all other wavelengths. Figure 4(a) shows the schematic of the phase holograms loaded on the 1st Opto-VLSI processor. The opto-VLSI processor used in this experiment is one dimensional having 4096 pixels spanning along the horizontal axis. Figure 4(b) shows the measured spectrum of the optical signal coupled back into the collimator at the SOA output. A 10Gb/s 8-bit non-return-to-zero (NRZ) pattern “10011010” was generated by Anritsu pattern generator (PG) to modulate the generated codeword.
The encoded signal was then sent to the decoder and routed to a 1-mm-diameter collimator, the collimated optical beam was launched towards a 1200 lines/mm grating surface that spread the wavelengths along different directions and mapped them onto the active window of the 2nd Opto-VLSI processor (decoder), which was loaded with the same phase holograms as those of the 1st Opto-VLSI processor. The coupled-back optical signal was detected by a high-speed photodetector and monitored using a high-speed digital oscilloscope. Figure 4(c) shows the received signal with a high-peak autocorrelation function, and Fig. 4(d) shows the eye diagram of an error-free transmission.
A mismatch between the encoder and decoder digital phase holograms results in a low-intensity output signal at the decoder sides. To prove this, the digital phase holograms loaded into the pixels blocks of the 2nd Opto-VLSI processor (decoder) were left unchanged (ie. the wavelength components λ1, λ2, λ4 λ5, and λ8 were coupled back) while the 1st Opto-VLSI processor (encoder) was reconfigured with a codeword assigned to couple back the wavelength components λ1, λ3, λ6, λ7, and λ8. Figure 5(a) shows digital phase holograms loaded onto the 1st opto-VLSI processor, and Fig. 5(b) shows the codeword. In this case, a low-amplitude cross correlation output signal was obtained, as shown in Fig. 5(c).
Fig. 4. (a). schematic of the phase holograms loaded on the 1st Opto-VLSI processor to generate a codeword employing λ1, λ2, λ4, λ5, and λ8. (b). Measured spectrum of the coupled back signal. (c). Received signal with a high-peak autocorrelation function. (d) The eye diagram of an error-free transmission.
Fig. 5. (a). Phase holograms loaded on 1st Opto-VLSI processor to generate a codeword employing λ1, λ3, λ6, λ7, and λ8. (b) Measured spectrum of coupled-back signal. (c) Received signal exhibiting a low-peak cross-correlation function.
4. Discussion
The results presented in Figs. 4 and 5 demonstrate the capability of the proposed FE-OCDMA encoder/decoder structures to encode and retrieve arbitrary bit patterns by generating an autocorrelation function whenever the digital phase holograms loaded on both encoder and decoder are matched, or a cross-correlation function otherwise. The measured optical power loss of the opto-VLSI processor was around 10dB (caused by the fill factor, diffraction loss, and mirror reflectivity), and the linewidth of the steered beams was 0.6nm with more than 20 dB sidemode rejection ratio (SMRR).
The scalability of the proposed structure depends on the broadband spectrum of the SOA, the size of the active window, and the pitch of the grating plate. The employment of a blazed grating plate of 600 lines/mm (rather than 1200 lines/mm) maps a wavelength span of 20 nm onto the active window of a 7.3mm×7.3mm Opto-VLSI processor. Therefore, by increasing the active window size of the Opto-VLSI processor to 20mm (commercially available), more than 40 equalised and non-overlapped wavelengths can easily be generated and detected.
The proposed FE-OCDMA encoder/decoder structure is very attractive for LAN and access networks applications because of its simplicity, cost effectiveness, compactness when the various components are integrated, and software-based tunablility along the wavelength range, this capability enables future network expansion/upgrade to be performed without the need for service interruption. Moreover, the transmitted data bit rate and the number of bits are independent of the codeword generation, making this structure attractive for high speed access networks.
The performance analysis of FE-OCDMA systems was recently reported by M. Rochette, et al. [2], where it was shown that multiuser interference (MUI) is the main factor degrading the performance of OCDMA systems. The impact of MUI on the performance of the proposed structure will be reported in the near future.
5. Conclusion
We have proposed and experimentally demonstrated a 10Gb/s FE-OCDMA encoder/decoder structure employing SOA and Opto-VLSI processors. The attractive feature of the structure is that it enables N encoders at each station to be replaced with a single SOA conjunction with Opto-VLSI processor. Codewords have been synthesised at the encoder and at the decoder using computer generated digital phase holograms, and a high-peak autocorrelation function at the decoder has successfully been observed when the digital phase holograms loaded on the Opto-VLSI processors of the decoder and encoder are matched. In “no match” scenarios, low-peak cross correlation functions have been detected and easily recognised from autocorrelation functions.
Acknowledgment
This work is supported by the Office of Science and Innovation, Government of Western Australia.
References and links
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