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Integration of low loss vertical slot waveguides on SOI photonic platforms for high efficiency carrier accumulation modulators

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Abstract

Silicon accumulation type modulators offer prospects of high power efficiency, large bandwidth and high voltage phase linearity making them promising candidates for a number of advanced electro-optic applications. A significant challenge in the realisation of such a modulator is the fabrication of the passive waveguide structure which requires a thin dielectric layer to be positioned within the waveguide, i.e. slotted waveguides. Simultaneously, the fabricated slotted waveguide should be integrated with conventional rib waveguides with negligible optical transition losses. Here, successful integration of polysilicon and silicon slot waveguides enabling a low propagation loss 0.4-1.2 dB/mm together with an ultra-small optical mode conversion loss 0.04 dB between rib and slot waveguides is demonstrated. These fabricated slot waveguide with dielectric thermal SiO2 layer thicknesses around 6 nm, 8 nm and 10 nm have been characterized under transmission electron microscopy allowing for strong carrier accumulation effects for MOS-capacitor electro-optic modulators.

Published by The Optical Society under the terms of the Creative Commons Attribution 4.0 License. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

1. Introduction

The relentless demand for large data bandwidth fuelled by the continual introduction of data hungry applications such as cloud computing for artificial intelligence and more specialized machine learning applications, etc, is pushing the bandwidth of data connections to the limit in data centres. Optical based data communication is replacing electrical based links over shorter and shorter reaches due to the superior bandwidths that can be handled together with the superior power dissipation qualities [1]. Silicon photonics is a leading technology in which to realise the components required for a short reach data link due to its low-cost, high-volume and high-yield manufacturing infrastructure [2]. One key component in a silicon photonic data link is the modulator which is required to take an electrical data signal and write the data onto an optical carrier [3]. Aside from data transmission there are other important applications requiring a high performance optical modulator with high linearity including radio over fibre [4] and LIDAR [5]. There have been many successful demonstrations of suitable silicon optical modulator throughout the previous decade which have largely been based upon the plasma dispersion effect in silicon [6] [7] or through the use of an electro-optic effect of a material hybridised with a silicon waveguide [8] [9]. Introducing different materials to silicon waveguides has been shown to give successful results in terms of modulation performance however fabrication simplicity and crucially CMOS compatibility can be compromised [10]. Plasma dispersion effect based modulators which use changes of electron and hole densities to alter the refractive index and absorption of silicon require relatively straight forward, CMOS compatible manufacture [11]. There have been three main categories of structure used to electrically manipulate free carrier densities in the silicon waveguide and therefore cause modulation [3]. Carrier injection based devices involves setting up a PIN diode around the silicon waveguide such that when the diode is forward biased, free carriers are injected into the waveguide and change the properties of the material in interaction with the propagating light. Such a structure is simple to fabricate and provides a good phase efficiency together with low loss, however, they are limited to speeds up to around 1 GHz [12]. A widely used device is based upon carrier depletion where a pn junction is positioned within the waveguide such that when a reverse bias is applied the depletion region extends thus changing the free carrier density in that region [3]. Carrier depletion devices have been demonstrated with 10’s of GHz bandwidth, moderate insertion losses and relatively simple fabrication, however their phase efficiency is relatively weak and device lengths on the order of mm’s are required [13] [14]. The third approach, the carrier accumulation device relies on a thin insulating layer positioned in the waveguide to form a MOS-capacitor (MOSCAP) like structure [15] which allows the accumulation of a thin but high density layer of free carriers in the waveguide under forward bias [16]. Such a device has good prospects for high speed operation and large phase change efficiency, however the fabrication required to form a low loss passive waveguide structure is much more challenging and therefore this device type has been much less popular [1719].

Here experimental results from the fabrication of vertical slot passive MOSCAP silicon photonic waveguides (without active doping), Mach-Zehnder interferometer and ring resonators are shown together with waveguide transitions with regular rib waveguides. Integration of polysilicon and single crystalline silicon comprised MOS-type waveguides in 8-inch SOI wafers has been successfully demonstrated, which enables a low propagation loss 0.4-1.2 dB/mm and an ultra-small optical mode conversion loss of 0.04 dB between a conventional rib waveguide and our passive MOS-type waveguides. The fabricated slot waveguides with dielectric thermal SiO2 layers thicknesses around 6 nm, 8 nm and 10 nm have been characterized under transmission electron microscopy, which allows MOSCAP modulators with phase change efficiencies in a range of 0.7-1.4 V*cm. These thin silicon Mach-Zehnder interferometer modulators with passive MOS-type waveguide phase shifters have also been demonstrated with 30 dB extinction ratio (ER) in the wavelength window from 1525 nm to 1600 nm. Slot ring resonators with radius of 50 µm exhibit loaded Q-factors in range of 15,000 to 19,000 at critical coupled conditions and in the range of 30,000 to 35,000 for under coupled conditions.

2. Waveguide and transition design

The proposed and designed vertical slot waveguide targets high performance electro-optic modulators with typical waveguide width (Wwg), height (H) and etch depth (hetch), 450 nm, 220 nm, and 110 nm, respectively, which are close to the dimensions of the conventional depletion modulator waveguides. As shown in Fig. 1, the main difference between the slot waveguide and rib waveguide is the thin layer SiO2 embedded between the two silicon rails. The thin SiO2 (Wslot) should be thin enough to support a high density carrier accumulation for a large phase change, thus Wslot below 10 nm [20] is required. To bridge optical wave propagation between the slot waveguide and rib waveguide, the thin SiO2 slot was bent and turned out of the waveguide core region with a radius of 200 µm, which is equivalent to a mode transition taper length of just 10.5 µm. The designed transitions between the optical modes of the rib waveguide, to slot waveguide and back to rib waveguide are depicted in Fig. 1. Poly-Si was used to compose one of the rails of the slot waveguides.

 figure: Fig. 1.

Fig. 1. (a), Schematic design of the waveguide transitions from rib waveguide into passive MOS-slot waveguide, and back to rib waveguide. The passive MOS-slot waveguide comprises of poly-si, silicon dioxide and single-crystalline silicon, horizontally stacked. The simulated optical TE modes, |E| confinements, of passive MOS-slot waveguide with 5 nm silicon dioxide layer and rib waveguide are depicted. (b&d), 3D-FDTD simulated mode conversion between rib waveguide and slot waveguide. (c) GDS-II layer design of mode conversion structure.

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3. Fabrication process

The devices are fabricated as follows and according to the process flow shown in Fig. 2. First three 8-inch SOI wafers with 220 nm top silicon layer and 2000 nm buried silicon dioxide layer (BOX) were taken. A 30 nm silicon dioxide layer was then thermally grown on the surface. This thermal oxide layer is required to later act as a chemical mechanical polishing (CMP) stopping layer. Next DUV-248 scanner lithography was used to define the positions of trenches in photoresist through which the trenches were etched by inductively coupled plasma (ICP) etching through the 30 nm top silicon dioxide layer and silicon overlayer down to BOX layer. A second thermal silicon dioxide growth was adopted to form a thin SiO2 on the silicon sidewalls. Next, amorphous silicon was deposited by low pressure chemical vapor deposition (LPCVD) into the trenches and thermal annealing with a pure nitrogen atmosphere at 1000°C for 10 hours used to form polycrystalline silicon. CMP was then used to planarize the waveguide down to the 30 nm silicon dioxide stop layer. Next scanner lithography was again used to define the waveguides and grating couplers which are etched into the silicon. Finally, a top silicon dioxide cladding layer is deposited by plasma-enhanced chemical vapor deposition (PECVD). During step. 3 “Trench etch” aligning the edges of the trenches as the centre of slot waveguides, Wafer-3 was biased with less dose during the DUV scanner lithography to slightly shift the thin oxide towards poly-si side, forming low-loss asymmetric slot waveguides [21]. Regular rib waveguides in both the single crystal silicon and the polysilicon were fabricated in addition to the slot waveguides in order to help identify the causes of any losses.

 figure: Fig. 2.

Fig. 2. Fabrication process flow of the passive MOSCAP waveguide.

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Focussed ion beam preparation was used to prepare thin lamellae for transmission electron microscopy (TEM) to characterize the cross-sections of the slot waveguides, as shown in Fig. 3. For the three fabricated wafers, slot waveguides with different barrier oxide thicknesses of ∼6, ∼8 and ∼10 nm were realized, which are named as MOS-WG-A, MOS-WG-B and MOS-WG-C respectively. The fabricated waveguide width (Wwg), height (H) and etch depth (hetch) were measured to be ∼470 nm, ∼205 nm, and ∼110 nm, respectively. After CMP process, 10 to 29 nm top thermal oxide remained across the whole wafer. Hence, the poly-si rails are slightly thicker than single-crystal rails. Limited by the trench etching recipe, the poly-si rails are also slightly deeper than the depth of silicon rails. These drawbacks could be further improved by optimizing the CMP and etching recipes.

 figure: Fig. 3.

Fig. 3. TEM characterization images of fabricated passive MOS-waveguides. (a) MOS-WGA has central tox ∼ 6 ± 0.3 nm, as shown in the inset and (b). (c) MOS-WG-B has an oxide thickness tox ∼ 8 ± 0.8 nm. (d) Asymmetric MOS-WG-C has an oxide thickness tox ∼ 10 ± 0.8 nm.

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4. Experimental results

Following fabrication, the three wafers were diced into samples for testing. The devices were measured by coupling polarized TE c-band light from a single mode fibre into the input grating coupler of the waveguide. Light was collected from an output grating coupler at the end of the waveguide and passed via optical fibre to a detector. For both waveguide and transition loss characterisation, a cut back method was used involving sets of waveguides with incremental lengths and sets of waveguides with different numbers of series transition tapers.

Optical losses were analysed by taking the data around wavelength 1550 nm as shown in Fig. 4, with fitted linear trends of loss versus length. From these data points we estimate the losses of the single crystal, polycrystalline and three different slot waveguides to be 0.26 dB/mm, 2.1 dB/mm and 0.4 dB/mm (MOS-WG-C), 0.9 dB/mm (MOS-WG-B) and 1.19 dB/mm (MOS-WG-A), respectively.

 figure: Fig. 4.

Fig. 4. Linear fitted optical losses of fabricated (1) silicon rib waveguides, (b) poly-si waveguides, slot waveguides (c) MOS-WG-C, slot waveguides (d) MOS-WG-B, slot waveguides (e) MOS-WG-A, and (f) mode transition tapers.

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The single crystal waveguide losses arise mainly due to side wall roughness which is limited by the DUV lithography, CMP and etching processes used in their formation and is expected to be similar for all three waveguide types. The polycrystalline silicon waveguide loss, 10 times higher than the losses of single crystal silicon rib waveguides, primarily comes from the material losses since the polycrystalline silicon has not been optimised for wave guiding applications. The difference in losses between the single crystal silicon rib waveguide and the slot waveguide loss is expected to be mainly due to the fact that half of the waveguide structure is now formed from polycrystalline silicon with inferior material losses rather than the slot waveguide structure itself, suggesting further improvements can be yielded relatively simply by improving the optical wave guiding properties of the polycrystalline silicon. Note that polycrystalline silicon waveguides with losses on the order of 0.92-1 dB/mm have been demonstrated previously in the literature [22]. The asymmetric slot waveguide, MOS-WG-C, was anticipated to have lower propagation losses compared with the symmetric waveguides, MOS-WG-A and MOS-WG-B, as the waveguide is comprised of more single crystalline silicon. By increasing the slot width by around 2 nm between the symmetric waveguides MOS-WG-A (6 nm) and MOS-WG-B (8 nm), an optical loss reduction has been measured.

To explain the optical losses of the three different slot waveguides (A,B,C), optical power confinement factors (Γj, j = A,B,C) in the polysilicon have been calculated to be 31%, 27%, 4%, respectively. Optical loss due to sidewall roughness (α0) is assumed to be the same as in the single-crystalline silicon waveguide. The polysilicon material induced optical losses (αp) can be extracted from the polysilicon waveguide by αp=(αp-WG- α0)/Γp-WG, in which αp-WG is the optical loss of polysilicon waveguide and Γp-WG (73.5%) is optical power confinement factor of the polysilicon waveguide. The total optical losses (αj, j = A,B,C) estimated for slot waveguides (A,B,C) roughly has been estimated, by equation αj= α0+ αpj, to be 1.04 dB/mm, 0.94 dB/mm and 0.36 dB/mm. respectively, which are very close to the experimentally measured values of 1.14, 0.90, 0.4 dB/mm. In other words, the polysilicon dominates the optical loss properties of these slot waveguides.

A summary and comparison of the optical losses together with state of the art for different MOSCAP or slot waveguides can be found in Table 1 and Fig. 5. Compared with optical losses in the range 0.7-1.5 dB/mm [23] [24] for single crystal slot waveguides with 10 times larger Wslot, our results didn’t show any deleterious losses when Wslot reduced to 6-8 nm.

 figure: Fig. 5.

Fig. 5. Scattering plot of optical losses of different waveguides of Table 1.

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Tables Icon

Table 1. Comparison of different waveguide losses.

Next, we considered the transition loss between a single crystal silicon rib waveguide and the slot waveguide. Experimental results of sub 0.1 dB have been obtained for all three different kinds of slot waveguides. Figure 4(f) shows the example of transition tapers losses for series tapers with numbers from 2 to 260. A total loss of 0.062 dB/transition is fitted for a 10.5 µm long taper, which also has a 26 µm long section of slot waveguide. By excluding the slot waveguide loss, the taper transition loss is just ∼ 0.04 dB, which is the same level for all three slot waveguides.

Additionally, Mach-Zhender interferometers (MZI) structures consisted of multimode interference couplers, mode transition tapers, and MOS-WG-A(B, C) have been fabricated. The inset of Fig. 6(a) shows the GDS-II layout configuration of the MOS waveguides on the two arms of the MZI. Figure 6 shows the spectral response of an imbalanced (MZI) including slot waveguide sections of length 0.46 mm together with a normalisation rib waveguide. It can be seen that compared to the normalisation waveguide, the loss at the peak of the MZI response is 1.8 dB, due to the sub dB optical losses of two multimode interference couplers (2 × 1, 2 × 2) and the two mode transition tapers on each arm. Furthermore, the passive extinction ratio of the MZI is in excess of 30 dB proving that the optical quality of the MZI has not been significantly affected by the inclusion of the slot waveguide sections.

 figure: Fig. 6.

Fig. 6. (a) Optical transmission spectra of a reference waveguide and an MZI, which has two arms consisted of 0.46 mm long MOS-WG-A waveguides. The inset is the GDS-II design of the MZI structure. (b) Zoomed in spectra around wavelength 1550 nm.

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Finally, all pass ring resonators composed of rib bus waveguides and slot waveguide rings with inner polysilicon rails have been characterized. Slot ring resonators with radius of 50 µm exhibit loaded quality factors (Q-factor) in the range of 15,000 to 19,000 at critical coupled conditions and in the range of 30,000 to 35,000 for under coupled conditions, as summarised in Table 2. For critical coupled situation, the measured Q-factors are comparable with single crystal slot silicon ring resonators with Wslot 90 nm [25]. While for small extinction ratio situations, the Q-factors are higher than the reported 27,000 in [24]. Besides, by taking the geometries captured by TEM, the simulated FSRs of ring resonators are very close to the experimental ones as depicted in Table 2.

Tables Icon

Table 2. Summary of measured Q-factors and ERs of ring resonator.

5. Summary

In this paper, we have demonstrated low loss vertical thin silicon dioxide slot waveguides for the purpose of achieving high-speed, high efficiency MOSCAP modulators. Losses down to 0.4-1.2 dB/mm have been demonstrated which is sufficiently low for MOSCAP device with expected lengths on the order of 100’s um. Further improvements could be expected through optimisation of the optical qualities of the polycrystalline silicon. Transition losses between a regular rib waveguide and the vertical thin slot waveguide are around 0.04 dB which is sufficiently small and negligible. Further, we have also demonstrated a passive imbalanced MZI with slot waveguides sections that have extinction ratios in excess of 30 dB demonstrating that the performance of the MZI has not been significantly affected by the inclusion of the slot waveguide sections. High Q-factor slot ring resonators with loaded Q-factors in the range of 15,000 to 35,000 can be achieved by tuning the coupling conditions. These results pave the way for high-efficiency, high-speed, high-EO linearity MOSCAP modulators based on ring resonators and MZIs to be formed in the future.

Funding

Engineering and Physical Sciences Research Council (EPSRC) and Rockley Photonics prosperity partnership (EP/R003076/1); Engineering and Physical Sciences Research Council (EPSRC) (EP/M008975/1, EP/N013247/1, EP/M009416/1); EU FP7 Marie-Curie Carrier-Integration-Grant (PCIG13-GA-2013-618116); European Commission Horizon 2020 project PICTURE (780930); University of Southampton Zepler Institute Research Collaboration Stimulus Fund.

Acknowledgments

The authors would like to acknowledge the CORNERSTONE [33] platform for support towards device fabrication. G. T. Reed is a Royal Society Wolfson Merit Award holder and is grateful to both the Royal Society and the Wolfson Foundation for funding the award. D. J. Thomson acknowledges Royal Society for his University Research Fellowship. All data supporting this study are available upon request from the University of Southampton repository at https://doi.org/10.5258/SOTON/D1340.

Disclosures

The authors declare no conflicts of interest.

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Figures (6)

Fig. 1.
Fig. 1. (a), Schematic design of the waveguide transitions from rib waveguide into passive MOS-slot waveguide, and back to rib waveguide. The passive MOS-slot waveguide comprises of poly-si, silicon dioxide and single-crystalline silicon, horizontally stacked. The simulated optical TE modes, |E| confinements, of passive MOS-slot waveguide with 5 nm silicon dioxide layer and rib waveguide are depicted. (b&d), 3D-FDTD simulated mode conversion between rib waveguide and slot waveguide. (c) GDS-II layer design of mode conversion structure.
Fig. 2.
Fig. 2. Fabrication process flow of the passive MOSCAP waveguide.
Fig. 3.
Fig. 3. TEM characterization images of fabricated passive MOS-waveguides. (a) MOS-WGA has central tox ∼ 6 ± 0.3 nm, as shown in the inset and (b). (c) MOS-WG-B has an oxide thickness tox ∼ 8 ± 0.8 nm. (d) Asymmetric MOS-WG-C has an oxide thickness tox ∼ 10 ± 0.8 nm.
Fig. 4.
Fig. 4. Linear fitted optical losses of fabricated (1) silicon rib waveguides, (b) poly-si waveguides, slot waveguides (c) MOS-WG-C, slot waveguides (d) MOS-WG-B, slot waveguides (e) MOS-WG-A, and (f) mode transition tapers.
Fig. 5.
Fig. 5. Scattering plot of optical losses of different waveguides of Table 1.
Fig. 6.
Fig. 6. (a) Optical transmission spectra of a reference waveguide and an MZI, which has two arms consisted of 0.46 mm long MOS-WG-A waveguides. The inset is the GDS-II design of the MZI structure. (b) Zoomed in spectra around wavelength 1550 nm.

Tables (2)

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Table 1. Comparison of different waveguide losses.

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Table 2. Summary of measured Q-factors and ERs of ring resonator.

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