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Abstract
High-birefringence liquid crystal (LC) in ultrathin LCOS panels was adopted to prepare high phase precision (mSTD =λ/50) and phase accuracy (mAPAE% ∼8%) with suppressed pixel-level crosstalk effects. In conjunction with optimized digital driving scheme, the zero order light loss was found directly related to the phase accuracy error. Meanwhile, the world’s fastest pure phase modulation LCOS with a response time of ∼0.87 ms at 45 °C was also achieved. The low-temporal flicker (P–P ∼2.0%) with high-speed LC responses was demonstrated by applying new digital driving scheme. Finally, the 4K2 K LCOS–SLM (∼7000 PPI) was evaluated its difficulties and opportunities.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Liquid crystal (LC) phase modulators have been extensively used in photonic applications, including switchable P–S polarization devices, tunable lenses/gratings, and reconfigurable q-plates using photo alignment technology. Nowadays, phase-only liquid crystal on silicon–spatial light modulator (LCOS–SLM) based on complementary metal-oxide-semiconductor (CMOS) technology is a dynamic diffractive optical element (DOE) in which the light can be directly defined in real time with the use of personal computer (PC) software. There have some potential phase-only modulation applications depending on the different operation wavelengths or receivers: such as three-dimensional (3D) holographic visual displays [1], laser materials processing [2–4], adaptive optics for imaging or biophotonics [5], beam steering for telecommunication applications [6,7], all-optical computing technologies [8].
High resolution driver boards with high-frame rates (i.e. dynamic flicker) have been developed by various companies, such as Meadowlark Optics (MLO), which launched a LCOS phase modulator (HSP1920) with a peripheral component interconnect express (PCIe) interface signal at a maximum frequency of 844 Hz [9]. In 2017, Holoeye Photonic (HEP) introduced the 2K1K LCOS microdisplay for amplitude modulation (1.0 π) with a high-definition multimedia interface (HDMI) 2.0 interface (720 Hz), with an LC response time in the range of 1-ms at 55 °C [10]. However, the high-speed interface could not support their LCOS phase modulators (i.e., LETO, PLUTO–2, and GAEA–2) owing to the fact that the response time of phase modulation (2.0 π) was too long (6∼30 ms). Wilkinson et al. reported 2π phase modulation with 1-ms response time is a key performance for advanced SLM applications [11]. Nowadays, the commercial microdisplay with microsecond (<1 ms) response times associated with ferroelectric liquid crystals (FLC) and microelectromechanical system (MEMS) devices, which are polarization-independent. These devices usually perform binary-only (0, π) modulation. Furthermore, the MEMS system has lower zero-order diffraction efficiency and higher production cost than LCOS [12]. Some fast LC phase modulators cannot be realized in high-PPI LCOS panels owing to the fact that these 2π voltage of LC phase modulators (>10 V) are larger than the maximum operation voltage of the integrated chip (IC) backplane, such as the dual-frequency LC (DFLC), polymer-network LC (PNLC), blue-phase LC (BPLC), and uniform-lying-helix LC (ULH–LC) [13], and multilayer scaffold to speed up LC response time for 2π phase modulator [14,15]. However, the ultrahigh PPI (>4000 PPI LCOS IC backplane has the) limitation of driving voltage under 5 V. The shorter LC response time that can be achieved under low driving voltage is still needed for realizing a fast high-PPI LCOS panels.
In comparison, the phase stability (i.e. time-fluctuation, also called as static flicker) may affect some applications when the detected time of the receiver is close to the LCOS’s fluctuation frequency. Prior research studies inferred that the analog LCOS was suitable for phase modulation owing to its better phase stability than digital LCOS. However, as the size of the pixel decreases, the storage capability of analog LCOS also decreases, which will experience low-frequency periodic fluctuations over time so that analog LCOS is difficult to achieve ultrahigh PPI (>4000 PPI) compared with digital LCOS [16]. In addition, a high-speed analog LCOS cannot easily yield a high-phase linearity compared with the programmable digital LCOS [17]. Márquez et al. proposed a model describing the flicker issue in the phase stability [18]. Many groups also presented several solutions to lower the phase flicker issues, such as minimizing Euclidean distance principle, turning electrical digital sequence, and constraining the operation temperatures at −8 °C to slow down LC response time [19–20]. Nevertheless, the solution of phase flicker optimization on ultrahigh PPI (> 4000 PPI) LCOS with fast response time (<10 ms) is not yet achieved in these works.
Ultrahigh PPI LCOS not only has the phase flicker problem but also unwanted spatially anamorphic phenomena including uniformity error (precision) and pixel-level crosstalk effect (accuracy) [21]. Recently, many photonic applications required higher spatial frequencies or smaller pitch sizes to achieve higher imaging resolution or larger diffractive angles. In 2019, ETRI presented an IC backplane with a 1.0 µm pitch for glass-based SLM, while Isomae et al. also reported a lattice-shaped dielectric wall structure with a 1.0 µm pitch as a method to avoid crosstalk effects with wide fields-of-view (FoV) [22,23]. However, challenges were associated with these studies: (1) the transmissive LC–SLM yields relatively low-fill factors (< 80%) and lengthier response times compared with those for the reflective LC–SLM. (2) The IC backplane with a pitch size of 1 µm will decrease the maximum driving voltage (e.g. < 2 V), thus making it almost impossible to achieve fast LC response times. (3) The design of the dielectric wall structure contains a large pixel-gap (∼0.2 µm) and pixel-metal (∼1.0 µm) ratios (ultralow fill-factor) which will decrease the image quality and efficiency. In addition, the cell gap depends on the height of the dielectric wall (∼1.0 µm) which requires an ultrahigh birefringence (Δn > 0.45) to maintain 2π phase response. Some research studies proposed the use of the novel computer generated hologram (CGH) algorithm for software compensation methods to improve the imaging quality, or the utilization of complicated optical engines to shade the unwanted zero-order light [24,25]. The software methods demanded additional CGH calculation time, especially in the cases of ultrahigh resolution or 3D imaging patterns, but hardware methods lead to bulky and costly optical systems. On the other hand, some commercial LCOS utilized a 12-bit or 16-bit driving firmware scheme to compensate non-uniformity issue [26], but this may impose an additional burden on the input clock frequency of the driver board. As a result, this work optimized LCOS assembly with lower cell-gap-to-pitch ratio (d/p) to suppress the spatially anamorphic phenomena. The performance is better than commercial LCOS without complicated optical system requirements. The CGH’s calculation time and input clock frequency can remain the same.
In this paper, reflective IC-backplane with a 6.4 µm pitch-size from Jasper Display Corporation (JDC) was adopted for the development of our 2K1K LCOS (∼4000 PPI) turn-key solution LCOS–SLMs, denoted as PCU–3–02-TKS. In 2018, we reported a 4000-PPI LCOS–SLM (PCU–3–01) with a response time of ∼2 ms at 45 °C [27]. We presented a new PCU–3–02-HS to realize world’s fastest phase-only LCOS–SLM panel with response time <1 ms at 45 °C. To suppress the temporal fluctuation, we prepared the PCU–3–02-LTF with the phase flicker as small as 0.02 π and its response time is 3x∼4x times faster than commercial LCOS. In addition, the PCU–3–02-HPPI panel with 3.74 µm pitch-size reflective IC-backplane (JDC) was adopted for our 4K2K LCOS (∼7000 PPI). In spite of the temporal fluctuation is still a challenge of the 4K2K panel, we present our approach to reach faster response time and higher phase accuracy compared with commercial 4K2K LCOS–SLM.
2. Experiments
2.1. LCOS panel assembly and LC mixture properties
Two types of LCOS IC backplanes: (1) A 0.55 in with 1920×1080 pixels with a pixel pitch of ∼6.4 µm (∼4005 PPI, FF∼93%), and (2) a 0.7 in with 4160×2464 pixels with a pixel pitch of ∼3.74 µm (∼6907 PPI, FF∼90%) were adopted in this work. The LCOS panels (PCU–3–02 series) were assembled in our fabrication lab. After a die-level LCOS empty cell assembly process, 15 locations from the entire active area of the LCOS were measured by the spectrometer to obtain the average cell gap. The alignment layer was prepared by polyimide (PI) under mechanical rubbing condition. The LC mixture (LCM–1107) was kindly provided by Professor Wu’s group and was filled and sealed in the LCOS cell before the wire bonding process. The melting temperature (Tm) and clearing temperature (Tc) of LCM-1107 are −12.3 °C and 98.9 °C, respectively. The four LCOS-SLM schemes (PCU–3–02-series) were used with different cell gaps (1.48–2.10 µm), pitch sizes (6.4 or 3.74 µm), and minimum digital ΔV2π at the operation temperature of ∼35 °C, as shown in Table 1. The operation temperature of our 2K1K panels (TKS, HS, LTF) was 35 °C, while those for the 4K2K panel (HPPI) with the heat sink ranged from 45 to 35 °C. At 35 °C and 45 °C, the birefringence values (Δn) at 633 nm were equal to 0.37 and 0.36, respectively. The γ1/K11 values were 9.0 and 7.4 ms/µm2, respectively. There also were three commercial LCOS–SLMs. The LETO used an ultrahigh dielectric constant (Δɛ) to minimize the driving voltage and the SRK series had the same LC cell designs with different pitch sizes. The operating temperature (Top) of 2KSRK was approximately 35 °C, while the corresponding temperatures for 4KSRK with their module design ranged from 60 to 45 °C.
Table 1. LCOS cell specification shows IC-backplane, LC properties at 25 °C under 633 nm, cell condition, and min digital ΔV2π at Top of PCU-3-02 series and commercial SLMs.
2.2. LCOS digital driving schemes
The digital LCOS with the PWM had a programmable advantage in that it achieved increased phase linearity with ultrahigh PPI and an increased LC switching speed. Prior research studies inferred that the PWM method was not suitable for phase modulation owing to the time-fluctuation, whereas improvements in the digital addressing schemes, development of higher addressing frequencies, or sequence designs, could also eliminate the influences of temporally varying flicker. Different digital addressing could be generated by the driver electronics, which could be programmed with the use of firmware programs, as shown in Table 2.
Table 2. Digital driving shows different LCOS controllers, configuration files, and digital addressing schemes of new PCU-3-02 series and commercial SLMs.
The following four steps outline the general procedure used to design the digital addressing sequence and to tune the LCOS panel for the linear phase modulation. First, the pixel-clock frequency (p-clkfreq) between the driver and signal interfaces was set which controlled the row and column pixels and input frame rate. Second, the total clock (Tclks) values could be defined according to Eq. (1) and (2), which defined the electrical addressing and the optical fluctuation frequencies. Additionally, the ideal condition was based on the memory writing time (mclksperrow/mclkfreq) faster than the imager refresh time (iclksperrow/iclkfreq) to avoid unwanted noise signals from the driver. Third, the total weight (twgt) was the digital addressing sequence whose configuration file could be designed by the four types of sequence bit-plane driving methods “LSB–STH–THM–WTB,” which correspond to the configurations labeled, such as “5–3–19–5” [19,28]. The first number indicates the number of the “binary” bit-planes, the second number is the number of the “equally weighted before stepping up” bit-planes, the third number is the number of the “equally weighted” bit-planes, and the fourth number is the number of the “off” bit-planes. A larger sequence provides a larger number of possible phase levels: (25×(3 + 1)×(19 + 1))+(5×0) = 2560 for the sequence “5–3–19–5.”. Fourth, a linear relation between the phase value and gray-level (GL) can be designed with a look-up-table (LUT) function. In this study, the initial digital modulation was associated with different bit-planes (for example, 1024, 288, 1360, or 2560), but these final linearity performances denote 2π modulations that correspond to 8-bit representations or 256-GLs.
2.3. LCOS phase modulation measurement
2.3.1. Phase linearity and precision
The measurement setup was based on a 633 nm laser, which was expanded by a spatial filter and was collimated by a lens. The TCS–3404 (from TAOS) or ET–2040 (from EOT) was adopted as a photodetector to measure the intensity for each gray level. It is a polarization interferometer (PIF) setup with a polarizer and an analyzer (χ = 90°) aligned at ϕ = 45° with respect to the rubbing direction. The measured GL with respect to the intensity curve was converted into a GL-dependent phase change curve using the following equation:
2.3.2. Phase accuracy and zero-order of CGH imaging projection
The phase accuracy was based on diffraction-grating method without an analyzer and the polarization direction of the collimated on-axis incident light is adjusted (ϕ=0°). The CGH’s phase patterns can be applied to evaluate the pixel-level anamorphic phenomenon according to the different spatial frequencies (SF) (for example, the period (P) = 2 (1 + 1) pixels/grating of 2K1K panel correspond to (SF) 76.0 lines per mm (lp/mm)) and grating orientations. The horizontal (H-grating) or vertical (V-grating) orientations of the binary grating are defined by the LC alignment direction either parallel or perpendicular to the binary grating electrodes. The pixel-level phase modulation is directly derived from the ratio of the intensities in the 0th diffraction efficiency based on GL–0, and is 100%, as shown in Eq. (7). In this work, we also measured the zero-order leakage intensity when CGH pattern was encoded in the LCOS–SLM compared with the non-modulated pattern GL–0 at 100% reflection. Either the grating’s diffraction efficiency or the CGH’s zero-order intensity was adopted based on power meter (LP1 from Sanwa) measurements acquired for each pattern. Analytical expressions for the intensity of the zero orders can be derived as a function of the phase shift:
2.3.3. Phase stability and LC switching speed
Temporal fluctuations were also measured with the use of the PIF setup. The photodetector ET–2040 (from EOT) was connected to a high-resolution oscilloscope TDS3034B (from Tektronix). The data were acquired every few µs for each GL. To quantitatively evaluate the phase flicker, minimal (min) and maximal (max) phase values for each phase level were included in addition to the measured phase shift based on the global LUT, average peak-to-peak (average P–P %), and mean standard deviations (mSTDs). All the phase levels (GL: 0–255) included representative average P–P and mSTD values for the different flickering effects (P–P) with a total phase modulation of 2π, and with the use of three standard deviation values (STD: max, measured, min). The measurement setup for the LC switching speed was the same as that used for phase stability measurements, but it toggled (dynamic flicker) the high-voltage frame (Vw) and low-voltage frame (Vb) to measure the 10–90% rise and decay times (Tr+Td) at the operating temperature. Phase stability refers to the maintenance of each GL frame for a set period of time. This was required to record the intensity ripple which was converted to a phase fluctuation (static flicker) by using Eq. (3).
3. Results and discussion
It is not easy to reach the phase linearity (RMS < 0.02 π), precision (mSTD < 0.04 π), accuracy (pixel-level APAE < 9% at above 76.0 lp/mm), stability (P-P < 3.0%), and high switching speed (<8 ms, or 120 Hz) at once. A turn-key solution of SLM (denoted as TKS) with a balance phase performance that can be driven at 120 Hz and at high spatial resolutions (>4000 PPI) was presented in section 3.1. In the holographic visual display, the higher speed (HS) of SLM is required to avoid dynamic flickering (image blur) rather than static flickering (time fluctuation), as long as the fluctuation frequency of LCOS is larger than that for the human eye (or detector) response frequency. The approach of HS-SLM was detailed in section 3.2. By contrast, the applications those need very low temporal fluctuation (LTF) of SLM instead of switching speeds, such as the wavelength selective switch (WSS). We present a LTF-LCOS with a low phase ripple response compared with the commercial analog SLMs in section 3.3. In section 3.4, we discussed the 4K2K (HPPI) of SLM to fulfill the applications that require higher pixels-per-inch (HPPI) LCOS for the higher spatial frequencies images or larger diffraction angle.
3.1. Turn-Key Solution (TKS) of LCOS–SLM
3.1.1. Phase accuracy of TKS LCOS–SLM
The phase error of the pixel-level crosstalk effect can be quantified by deviating from the ideal binary grating that is related to the unwanted LC fringing field and reverse-tilt effects. The two-level grating note that we fix one of the levels in the binary grating to gray level zero, which shows no phase retardation, whereas the other gray level is varied (GL: 1∼255). Thus we measure the pixel-level phase modulation. As Fig. 1 shows, there are three different pixel-level phase accuracy results for LCOS–SLMs with three different cell gaps (d∼3.8, ∼2.4, and ∼1.82 µm) for the same IC backplane (p = 6.4 µm). The pixel-level APAE of the H-grating for a maximum SF are 16.56, 12.83, and 7.41% for 2KSRK, LETO, and TKS, respectively. In our newest PCU–3–02–TKS, the pixel-level APAE is significantly lower (higher phase accuracy) which minimize the ratio of d/p to an approximate value of 0.284 (1.82 µm) in the case of the LCOS panel. Smaller d/p value can more suppress LC crosstalk effect; due to the thinner cell can achieve more regular electric field. In the two-dimensional (2D) micropixel array of LCOS, the vertical grating’s crosstalk phenomenon not only resulted in a fringing field effect but also evoked a stronger asymmetrical deformation which was caused by the reverse tilt effect [30]. The pixel-level APAE of the V-grating for the maximum number of SFs were 18.96, 11.19, and 8.99%, for the 2KSRK, LETO, and TKS, respectively. The reverse-tilt effect can be affected by the per-tilt angle of the alignment layer. This study utilized a high figure-of-merit (FoM) for LC. Thus, it does not require lower pretilt angles (0–2°) at ultrathin cell gaps to maintain fast responses and 2π modulation [31]. The FoM equation of the LC is defined as,
Fig. 1. The pixel-level phase modulation with various spatial frequencies (period = 1 + 1, 2 + 2, 8 + 8) and grating directions (H and V grating) in 4,005 PPI 2K1K LCOS-SLMs are obtained: (a) 2KSRK with d/p∼0.59, (b) LETO with d/p∼0.38, and (c) PCU-3-02-TKS with d/p = 0.28.
3.1.2. Phase stability of TKS LCOS-SLM
The phase error of the temporal fluctuation (phase stability) is quantified by holding each GL frame for a set period of time to record the flicker deviation to quantify the RMS response of phase modulation (phase linearity). To meaningfully discuss the time fluctuation, our measurements used the same IC backplane specifications, operation temperature (∼35 °C), and optical measurement equipment (laser and photodetector). As Fig. 2 illustrates, there are three temporal fluctuation results associated with different LCOS–SLMs. The results of the average P–P values are 5.0%, 3.3%, and 2.6%, based on the total phase modulation of 2π radians for 2KSRK, LETO, and TKS, respectively. Their addressing frequency (Tclks) values were 2.77, 2.38, and 1.02 ms, respectively. Their LC response times (RT) were 26.44, 25.88, and 7.11 ms, and the rising times (Tr) were 10.04, 7.48, and 2.64 ms, respectively, as shown in Table 3. Digital LCOS can maintain high phase stability as long as the addressing frequency is higher than the fastest LC toggle frequency of SLM (i.e. LC rising time). As a result, an increased digital addressing frequency can develop a faster LCOS phase modulator. In addition, a larger sequence (“4–4–16–8”) using in 2KSRK provides a larger number of phase-levels (bit-planes). However, in principle, the smaller flicker can be found in the shorter sequence (“5–0–8–0”) used by LETO. The PCU–3–02–TKS LCOS utilizes a binary PWM-only sequence for simulating the analog signals at smaller 2π digital voltage (Vw-Vb) compared with utilizing other digital sequence design and the TKS can achieve the minimum Euclidean distance principle without sacrificing the phase depth owing to the ultrahigh Δn LC which exhibits a more linear electrical–optical (EO) response before the LUT calibration procedure. Meanwhile, the TKS had faster addressing frequency than LETO. Therefore, the TKS can eliminate the phase ripple to achieve the same phase stability performance compared with the commercial LETO (ultrahigh Δɛ LC), even if the TKS evokes a shorter response time, a slightly higher digital voltage (ΔV2π), and a larger sequence design (“10–0–0–0”) compared with LETO. According to the five factors referred to earlier, i.e., (1) addressing frequency (Tclks), (2) LC switching speed (RT), (3) operation voltage (ΔV2π), (4) minimum Euclidean distance principle (cell design instead of adjusting bit-plane), and (5) bit-plane depth, number, order, and duration of individual bit-plane (sequence design), ultrahigh PPI (>4000 PPI) of digital-LCOS with higher switching speed (< 8 ms) also can optimize the temporal fluctuation. In a nutshell, our results suggested that the lower phase flicker can be achieved by neither the complicated sequence design nor the smaller bitplane numbers. The other factors, such as driving voltage, response time, addressing frequency (Tclks), and phase linearity before LUTs, are needed to be taken into consideration. For example, the rising time of 2KSRK, LETO and TKS are all slower than their Tclks values. The phase flicker of 2KSRK is worst because the larger driving voltage and bitplane numbers are applied. The LETO should have better phase stability than TKS because of its smaller bitplane numbers and smaller driving voltage. On the contrary, the TKS achieves the same phase stability performance as LETO due to its faster addressing frequency and slightly more phase linearity before LUTs function than LETO.
Fig. 2. The temporal fluctuation of phase modulation with different 2K1K LCOS-SLMs are obtained: (a) 2KSRK with Tclks = 2.77 ms, (b) LETO with Tclks = 2.38 ms, and (c) PCU-3-02-TKS with Tclks = 1.02 ms.
Table 3. The summary shows digital voltage, linearity, spatially anamorphic and time-fluctuation performance of PCU-3-02-TKS and commercial version (2KSRK, LETO).
3.1.3. Summary of TKS LCOS-SLM
LCOS spatially anamorphic phenomenon includes not only the uniformity deviation (phase precision) but also the pixel-level crosstalk effect (phase accuracy). Our previous studies have discussed how to measure and ensure the individual factor effect in phase precision. In particular, the projected CGH imaging results that affected by the linearization of the phase-shift [32]. In general, the zero-order light in CGH’s kinoform encoding to LCOS should be zero in the ideal phase-only modulation (2π radians and ϕ=0°). However, the zero-order light loss exists in most cases when using SLM. To evaluate the CGH’s zero-order light loss related to individual phase characterizations, the CGH’s phase pattern (i.e. kinoform) targeting amplitude imaging of NCTU–LOGO was computed by the iterative Fourier transform algorithm (IFTA) with the Fresnel (near-field) diffraction equations derived based on the scalar diffraction theory, as shown in Fig. 3. NCTU–LOGO holographic reconstruction imaging of the linearization calibrated LCOS panels was conducted. The diffraction imaging and zero-order loss light were separated for evaluation by using shift theorem in CGH’s code. In Table 3, the mSTD of phase of the phase precision values are 0.03 π (∼λ/60), 0.04 π (λ/50), and 0.04 π (λ/50) in the 2KSRK, LETO, and TKS, respectively. Their pixel-level mean-APAE values (mAPAE: APAE values of the H- and V-gratings at maximum SF were ∼50%) are 17.80, 11.71, and 8.21%, respectively. Their zero-order light loss values in the case of CGH’s imaging were 17.46, 11.45, and 8.25%, respectively.
Fig. 3. Zero-order light intensity of TKS is obtained: (a) At “GL-0” frame, (b) At “CGH” phase pattern of “NCTU-LOGO”, and (c). The target amplitude pattern of “NCTU-LOGO”.
In addition, we prepared different uniformity errors from mSTD between 0.04∼0.07 π of PCU-3-02-TKS LCOS panels with similar cell gap to evaluate how much smaller of mSTD of phase precision cannot affect the zero-order loss performance. Our results suggested that the zero-order light loss was not affected when the panel’s mSTD of phase precision below 0.04 π. These results suggested that the phase accuracy and the residue of zero-order light are strongly tied to each other as long as the linearity APAE % below 1.4% and the mSTD of phase precision can be controlled lower than 0.04 π. To further investigate the correlation between the phase accuracy and the zero-order light loss, we revisit the diffractive efficiency equation:
3.2. Higher Speed (HS) of LCOS–SLM
The TKS with a lower driving voltage (Vw = 2.1, Vb = 0.7 V) is able to achieved high-speed switching (∼7 ms) at 35 °C. Many phase modulation applications require fast responses (2–4 ms) or even submillisecond responses (∼1 ms) (lower dynamic flicker) to develop advanced SLM technologies. To achieve the fast responses, the TKS can be operated at higher driving voltages (Vw = 5.0, Vb = 1.53 V) to obtain ∼3.43 ms of full 2 pi phase modulation, as shown in Fig. 4(a). The faster RT and higher driving voltage enlarge the average P–P of the temporal fluctuation from 2.6% to 8.3% The higher static phase flicker will reduce diffractive modulation efficiency from 40.1% to 30.7% of binary phase grating at maximum spatial frequency (76.0 lp/mm). However, its linearity, precision, and accuracy values are not different compared with the TKS which is operated at the lower driving voltages. The zero-order light loss of holographic imaging also can be lower than 10%, which is better than 2KSRK and LETO, even if these commercial SLMs yield lower flicker responses. Therefore, the temporal fluctuation problem is not relative to the holographic displays but is due to the fluctuation frequency which is higher than the response time of the human eyes. Given that submillisecond responses have become possible, phase-only (2π) LCOS can further broaden SLM applications. Accordingly, we presented the outcomes of the thinner cell gap ∼1.48 µm of the PCU–3–02–HS LCOS panel. At 35 °C, the rise and decay time of HS were 0.32 ms and 1.93 ms for the digital voltages of Vw = 5.0 V and Vb = 1.0 V, respectively, as shown in Fig. 4(b). In addition, we utilized a thermal control system (Arroyo Instruments TECSource 5240) to increase the LCOS panel’s operating temperature to 45 °C. The rise and decay time at 45 °C were 0.16 ms and 0.71 ms for the digital voltages of Vw = 5.0 V and Vb = 0.1 V, respectively, as shown in Fig. 4(c). Hence, this is considered as the world’s first and fastest phase-only 4000 PPI LCOS in real panels with a response time of < 1 ms.
Fig. 4. Measured phase rise (low to high voltage frame) and decay (high to low voltage frame) times of PCU-3-02 series LCOS panels at λ = 633 nm are obtained for (a) TKS at high driving voltage under 35 °C, (b) HS under 35 °C, and (c) HS under 45 °C.
3.3. Lower Temporal Fluctuation (LTF) of LCOS–SLM
The TKS LCOS–SLM at low-driving voltages can achieve LTF (average P–P ∼3.0%) and ∼4× times faster than the commercial digital LCOS (2KSRK and the 1st generation LETO). Some applications require higher phase stabilities of the order of ∼2.0%, similar to the commercial analog-LCOS cases (Hamamatsu Photonic; HMP). In 2019, the HEP presented the 2nd generation LETO digital LCOS series (LETO–NIR–08) which operates at 635 nm to achieve ∼2.0% phase flicker. However, its response time increased from 27 ms to 40 ms compared with the 1st generation LETO. We slightly increased the cell gap to 2.10 µm to develop PCU–3–02–LTF for lower phase flickering. The rise and decay times of the LTF were 4.84 ms and 4.88 ms for the digital voltage of Vw = 1.77 V and Vb = 0.70 V, respectively, as shown in Fig. 5(a). Our LTF–LCOS increases the LC response time from 7.11 ms to 9.72 ms compared with TKS–LCOS. The average P–P and mSTD of the phase flicker can be suppressed from ∼3.0% to ∼2.0%, and from 0.03 π to 0.02 π radians, respectively, as shown in Fig. 5(b).
Fig. 5. Measured temporal phase modulation of PCU-3-02-LTF LCOS panel with 35 °C at λ = 633 nm is obtained for (a). LC switching speed (toggle) and (b) phase flicker (holding).
3.4. Higher Pixels-Per-Inch (HPPI) of LCOS–SLM
Higher PPI (∼7000 PPI) LCOS–SLM with smaller pitch-sizes (<4 µm) is important to enlarge the diffraction angle in square or rectangular arrays of gratings patterns (i.e. beam splitting). In addition, HPPI settings (larger spatial frequency) are helpful to improve the performance in circular apertures of lens patterns (i.e. beam focusing). Based on the section 3.1, the PCU–3–02–TKS (4005 PPI) 2K1K–LCOS with the cell gap ∼1.8 µm is the most optimized LCOS cell condition. Thus, section 3.4 presents the same cell gap of PCU–3–02–HPPI (6907 PPI) 4K2K–LCOS for discussing the spatially anamorphic and time–fluctuation performance.
3.4.1. Phase accuracy of HPPI LCOS–SLM
As Fig. 6 illustrates, two different pixel-level phase accuracy results are presented for LCOS–SLMs. The mAPAE values for a max number of SFs to achieve phase accuracy for 4KSRK, 2KSRK, HPPI, and TKS, are 30.46, 17.80, 16.30, and 8.21%, respectively. Their d/p values are ∼1.02, ∼0.59, 0.47, and 0.28, for 4KSRK, 2KSRK, HPPI, and TKS, respectively. The d/p value of 4KSRK is > 1 so that the most obvious crosstalk effect decreases the maximum phase shift from ∼2.0 π to ∼0.6 π radians. This is why many previous research studies utilized the 4KSRK (from JDC) with higher spatial resolution, but the imaging quality and diffraction efficiency outcomes were very poor compared to their 2K1K schemes. The HPPI with lower d/p ratios could improve the phase accuracy by ∼2× compared with 4KSRK. Ideally, the HPPI LCOS filled with the ultra-high Δn LC can reduce the cell gap to 1.0 µm for achieving 2π phase shifts and for improving the phase accuracy in a manner similar to TKS LCOS. Practically, this LCOS type cannot realize a 2π radian phase shift for a thickness of 1.0 µm owing to the maximum driving voltage (< 3.3 V) limitation of the ultra-fine pixel size and ultra-thin cell effect [33]. The higher gray levels (>200) deviate from the ideal phase curve owing to the higher gray level mainly due to electric field distortion between pixels yielding from the larger RMS-equivalent digital voltage. As a result, the binary grating was gradually altered to the sinusoidal grating yielding the phase deviation. S. Moser proposed the pixel crosstalk model to analysis and compensate fringing field effect under the thicker cell gap (3.98 µm) and larger pixel-size (15-µm) of commercial LCOS-SLM in 2019 [34]. We suspected that the alignment layer effect and pixel-gap effect in the thin cell besides the fringing field effect and reverse tilt effect mentioned in the reference. Further investigation is needed to clarify the causes.
Fig. 6. The pixel-level phase modulation with various spatial frequencies (period = 1 + 1, 2 + 2, 8 + 8) and grating directions (H- and V- grating) in 6907 PPI (pitch = 3.74 µm) 4K2K LCOS-SLMs are obtained: (a) 4KSRK with d/p∼1.02 and (b) PCU-3-02-HPPI with d/p = 0.47.
3.4.2. Phase fluctuation of HPPI LCOS–SLM
The rise and decay time of 4KSRK at 45 °C were respectively equal to 6.0 ms and 9.92 ms for digital voltage inputs of Vw = 3.38 V and Vb = 0.98 V. The mSTD and average P–P of 4KSRK were 0.07 π and 6.7%, as shown in Fig. 7(a). The rise and decay times of HPPI at 35 °C were respectively equal to 1.86 ms and 5.36 ms for the digital voltage inputs of Vw = 2.2 V and Vb = 1.0 V, respectively. The mSTD and average P–P values of HPPI were 0.11 π and 11.1%, as shown in Fig. 7(b). The phase stability of 4KSRK was better than our new HPPI LCOS–SLM, even if the 4KSRK has a slower addressing frequency (4.16 ms), larger driving voltage, and higher operating temperature. There are two reasons for the observed results: (1) The HPPI’s LC rising time (1.86 ms) is much faster than the Tclks time (3.40 ms) so that fast LC switching cause the static phase flicker enlargement. The Tclks value of the new 4K2K driving scheme (“8–0–3–0”) increases from 1.02 ms to 3.40 ms compared with the 2K1K driving condition (“10–0–0–0”) owing to 4K2K which has more pixels so that both twgt and mclksperrow are twice as high as compared to their values in 2K1K LCOS. (2) The phase fluctuation is disturbed when the memory writing time (0.144 µs) is longer than the imager refreshing time (0.097 µs), which enlarges the noise from the 4K2K LCOS driver. Therefore, the ∼7000 PPI LCOS has greater challenges to achieve the 2π phase response time at 1-ms with mSTD of phase flicker to 0.03 π, due to the maximum driving voltage limitation < 3.3 V and larger twgt and mclksperrow values.
Fig. 7. The temporal fluctuation of phase modulation with different 4K2K LCOS-SLMs are obtained: (a) 4KSRK with Tclks = 4.16 ms and (b) PCU-3-02-HPPI with Tclks = 3.40 ms.
4. Conclusions
Phase characterizations of the spatially anamorphic phenomenon and the temporal fluctuations are important and have been extensively utilized in many photonic applications with LCOS–SLM, especially in the faster response and the higher resolution requirements. This study revealed the key LCOS cell design and digital driving scheme that were able to suppress the LC pixel-level crosstalk effects with a higher phase precision and optimized phase flickering in phase-only digital LCOS, without sacrificing the operational temperature, phase depth, phase linearity, LC response time, CGH’s calculation time, and pixel-clock frequency (resolution and frame rate), and without any complicated optical system requirements. Further, the zero order light loss of LCOS panel is attributed to the phase accuracy in controlled high phase linearity and precision.
The use of ultra-high birefringence LC mixtures not only can minimize the cell gap to speed up the LC response time and suppress the fringing field effects, but also can reduce the minimum ΔV2π for phase flicker optimization. The higher FoM value of LC mixture is able to achieve increased switching speeds at lower driving voltages. From analyzing the digital addressing associated with the temporal fluctuation and phase linearization, the smaller bit-plane configurations can prevent lengthy sequence weights, but they cannot necessarily enable the reduction of the phase flicker or avoid power consumption implications, which also need to consider the addressing frequency (Tclks) and the imager’s refresh rate. Conversely, the larger bit-plane configurations exhibited improved digital programmability. It is helpful to linearize the phase modulation scheme with the use of a LUT, even if the LC behavior exhibits the smallest phase depth (2π) at the maximum operated voltage. Importantly, the addressing frequency (Tclks) is established to design each of the factors which will affect the phase flicker and linearity. The Tclks value is the overall electrical addressing frequency. It also corresponds to the optical fluctuation frequency that can be the upper limit for the development of faster LC responses when the application requires a compromise between the switching speed and phase flicker. On the other hand, the Tclks value can be used to confirm the phase fluctuation frequency irrespective of whether it is faster than the detector's reaction time for some applications which do not require higher phase stability performance.
Two types of 10 bit (1024-bit-plane) PWM configurations were proposed for the 2K1K (“10–0–0–0”) and the 4K2K (“8–0–3–0”) driving schemes. With different LC thicknesses in the case of the 2K1K LCOS phase modulator (∼4000 PPI), three different features of SLM solutions were developed: (1) larger cell gaps (∼2.1 µm) of PCU–3–02–LTF achieved speeds that were ∼3× times faster than the commercial analog LCOS–SLM for the same phase linearity and temporal fluctuation performance (P-P∼2.0%). (2) The ideal cell gap (∼1.8 µm) of the PCU–3–02–TKS was ∼4× times faster than the commercial digital LCOS–SLMs, yet maintained increased phase linearity, precision, accuracy, and stability (P-P∼3.0%), without the utilization of additional compensation methods. (3) The smallest cell gaps (∼1.48 µm) of the PCU–3–02–HS operated at 45 °C and led to the development of the world’s fastest (∼0.87 ms) phase-only (2π) LCOS in the real panel. For smaller pixel pitches equal to 3.74 um (4K2K) and for the same cell gap (1.8 µm) as the TKS, the PCU–3–02–HPPI can maintain increased linearity and precision. However, the spatial crosstalk effects and temporal fluctuations are still major challenges owing to the thin-cell effect, the limitation of the driving voltage, the addressing frequency, and the 4K2K driver’s noise signal. The future improvement will not only relay on the selection of LC materials and cell gap design, but emphasis on the controlled LC alignment in LCOS [35], the optimization memory and imager of LCOS’s IC-chip in the driver board, the real-time software algorithm design, and high-speed interface signal circuitry in ultra-high resolution (>4K2K) without the sacrifice of power consumption.
Funding
Ministry of Science and Technology, Taiwan (MOST107-2221-E-009-079); Research Team of Photonic Technologies and Intelligent Systems at NCTU within the Higher Education Sprout Project by the Ministry of Education.
Acknowledgments
The 2K1 K and 4K2 K IC-backplane dies were kindly provided by Jasper display Corp (JDC). The LCM-1107 LC mixture is kindly provided by Prof. S.-T. Wu’s group from University of Central Florida (UCF).
Disclosures
The authors declare no conflicts of interest.
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