1. Introduction

The III-nitride materials system (Al,Ga,In)N has been attracting a growing attention since the first demonstration of blue semiconductor laser diodes (LDs) in the early 1990s [1]. While already being implemented in various applications such as projection displays, optical data storage systems [2], and potentially in future visible light communication systems [3], III-nitride LDs are also considered for high luminance laser-based white lighting [4–7]. Compared to light emitting didoes (LEDs), for high intensity lighting applications such as automobile headlamp and industrial lamp applications, LDs offer more power per chip area, much higher spatial brightness, and no efficiency droop above threshold [8]. To realize such applications, high-power continuous-wave (CW) operation of a LD is essential. But, to date, III-nitride LDs performance is still impeded by high operating voltage and poor differential efficiency, which result in wall-plug efficiencies (WPE) that are much lower than InGaN LEDs and other III-V LDs [6, 9, 10]. Switching the growth substrate from the conventional c-plane of GaN to semipolar planes should improve the differential efficiency [11]. These planes are predicted to have higher radiative efficiency and higher gain due to reduced polarization related electric fields [12,13]. In particular, the semipolar $(20\overline{2}\overline{1})$ plane is of great interest for blue emitting lasers, as it allows higher indium incorporation in the InGaN quantum wells and a higher electron-hole wavefunction overlap compared to the semipolar $(20\overline{2}\overline{1})$ and c planes [14,15].

Reducing LDs operating voltage, however, remains a challenging task. The high voltage together with high currents leads to a junction temperature increase in CW operation, which in turn causes carrier overflow from the quantum wells and reduced optical gain that is observed as a rollover in the light output. To mitigate the high junction temperature, the active region heat is commonly dissipated by external packaging means, such as high thermal conductivity submounts [4], p-type side down mounting [6], and substrate thinning. Alternatively, it is desirable to minimize heat generation rather than dissipating it. One promising approach to reduce LD operating voltage is replacing part of the high resistivity thick p-GaN or p-AlGaN cladding layer with low refractive index transparent conductive oxide (TCO), such as indium tin oxide (ITO) [16,17], or zinc oxide (ZnO) [18]. The low refractive index of the TCO helps to confine the optical mode in the active region without introducing significant optical loss from the metal contact. This approach also shortens the exposure time of the QWs to the high growth temperature of the p-cladding layers, which minimizes their potential thermal damage and loss of radiative efficiency. In previous attempts to utilize this approach, lasing of blue [16] and green [17] LDs incorporating TCO/thin-p-GaN cladding in pulse mode were demonstrated. So far, however, there has been little discussion about the benefits of these structures to CW operation.

In this letter, we demonstrate an enhanced CW operation of blue LDs grown on a semipolar $(20\overline{2}\overline{1})$ n-GaN substrate using ITO/thin-p-GaN cladding layers. With 250 nm thick p-GaN a very low CW operating voltage of 5.35 V at 10 kA/cm² was obtained compared to 7.3 V for LDs with a conventional 650 nm thick p-GaN layer. This enabled pushing the CW thermal-rollover of the light output-current curves by 8.3 kA/cm² with about 40% increase in peak light output power. Infrared thermography mapping that was performed during LDs CW operation confirmed a reduction of the peak surface temperature from 85°C for LDs with thick p-GaN to 58°C for LDs with 250 nm p-GaN. Finally, we demonstrate the tradeoff between lower operating voltage and increased optical loss as the p-GaN thickness is reduced, using additional LDs comprising 150 nm and 250 nm thick p-GaN layers.

2. Experimental procedure

A schematic cross-section of the fabricated edge emitting LDs on a free-standing bulk semipolar $(20\overline{2}\overline{1})$ n-GaN substrate, provided by Mitsubishi Chemical Corporation, is shown in Fig. 1. The epitaxial structure was grown by atmospheric pressure metal organic chemical vapor deposition. It consisted of, from bottom to top, a 1.2 µm Si-doped (~4x10¹⁸ cm⁻³) n-GaN buffer grown at 1180°C, a 65 nm Si-doped (~1x10¹⁹ cm⁻³) n-In_0.07Ga_0.93N waveguide layer compositionally graded to GaN over 10 nm at each side grown at 910°C, a 20 nm undoped GaN barrier layer, a 2-period multiple quantum well (MQW) active region with 3.5 nm In_0.18Ga_0.82N QWs and 7 nm GaN barrier layers grown at 840°C, followed by an additional 15 nm undoped GaN top barrier. The LD p-type epitaxial layer growth started at 1000°C with a 15 nm Mg-doped (~5x10¹⁸ cm⁻³) p-GaN layer, followed by a 20 nm Mg-doped (~3x10¹⁹ cm⁻³) p-Al_0.28Ga_0.72N electron blocking layer (EBL). A 65 nm Mg-doped (~1x10¹⁹ cm⁻³) p-In_0.07Ga_0.93N waveguide layer compositionally graded to GaN over 10 nm at each side was then grown at 910°C, followed by a Mg-doped (~2x10¹⁸ cm⁻³) p-GaN cladding layer with varying thicknesses of 650 nm and 250 nm, and a final 20 nm highly Mg-doped (~1x10²⁰ cm⁻³) p⁺-GaN contact layer grown again at 1000°C.

 

Fig. 1 A schematic cross-section of the fabricated LDs with ITO p-contact layer. P-GaN cladding layer thickness was varied.

Download Full Size | PDF

The fabrication process started with a 15 min 600°C furnace activation in air of Mg dopants. A ridge waveguide, oriented parallel to the projection of the c-axis on the $(20\overline{2}\overline{1})$ surface, was formed using a Cl₂ reactive ion etch (RIE) with an etch rate of 120 nm/min. Samples with p-GaN thicknesses of 250 nm and 650 nm were etched for 1.9 min and 5 min, respectively. Then, a 230 nm thick SiO₂ layer was magnetron sputtered at 3 mT over a patterned bilayer photoresist mask comprising Shipley Megaposit SPR955-CM-1.8 on top of a recessed underlayer of LOL 2000, which allowed a self-aligned lift-off process to form the ridge and insulated sidewalls. Prior to p-contact deposition, a 15 min concentrated hydrochloride acid surface treatment was performed. A 150 nm thick indium tin oxide (ITO) p-contact and cladding layer was blanket deposited by e-beam evaporation at a substrate temperature of 250°C using an In₂O₃:SnO₃ 90:10 wt% target under an oxygen partial pressure of 3x10⁻⁴ Torr. P-contacts were defined and etched by reactive ion etching the ITO using CH₄/H₂/Ar (4/20/10 sccm) gas flow at 75 mT and DC bias of 350 V. Ti/Au (30/1000 nm) contact pads were then e-beam evaporated on top of the ITO.

To form the LDs facets, a positive-tone photoresist (SPR 220-7.0) was used, coated to a thickness of about 7 µm and patterned with an i-line stepper. First, the SiO₂ layer above the facets was etched using a buffered HF, then facets were formed by chemically assisted ion beam etching in an Oxford Ion Mill system with an Ar ion beam and Cl₂ gas injection [19], without application of optical facet coatings. To ensure facets were as close as possible to vertical, the sample platen was positioned at an optimized 33° with respect to the ion beam. This technique produces etches with rms line edge roughness of 2 nm and angle 1° from vertical [19].

A common n-contact was formed on the wafer back side by e-beam evaporation of Al/Ni/Au (50/100/300 nm) without post-deposition annealing or surface pretreatment. For CW testing, the samples were soldered with Pb/Sn/Ag solder to a copper block. The cavity lengths of the LDs ranged from 900 µm to 1800 µm, and the ridge widths ranged from 2.5 µm to 15 µm. LDs were tested under pulse and CW electrical injection. A pulse width of 1 µsec and 1% duty cycle was used. Infrared (IR) thermography measurements were conducted using a Quantum Focus Instruments InfraScope system, equipped with an infrared 512x512 pixel InSb focal plane array camera detecting at 2 µm to 4 µm.

3. Results and discussion

One of the main benefits of using ITO/thin-p-GaN cladding layers is demonstrated in Fig. 2, which compares four probe current-voltage (I-V) characteristics under CW operation of LDs with p-GaN thicknesses of 650 nm and 250 nm. A significantly lower operating voltage (V_op) of about 5.35 V at 10 kA/cm² was obtained by thinning down p-GaN cladding layer thickness to 250 nm compared to 7.3 V for LDs with conventional 650 nm thick p-GaN. This low operating voltage is much lower than previously reported for blue LDs on semipolar GaN substrates [20,21], and is comparable to highly optimized c-plane LDs [22]. At a peak lasing wavelength of 430 nm this operating voltage translates to a voltage efficiency of hν/qV_op = 54% for LDs with 250 nm p-GaN compared to 40% for LDs with 650 nm p-GaN, or overall WPE of 14% compared to 10.9% for these set of LDs, respectively.

 

Fig. 2 CW current voltage characteristics of 8 µm x 1800 µm LDs with 650 nm and 250 nm p-GaN. Thinning down p-GaN thickness significantly reduced the operating voltage. At 10 kA/cm², the voltage dropped from 7.3 V to 5.35 V.

Download Full Size | PDF

Interestingly, this dramatic improvement cannot be explained by a simple reduction of the series resistance alone, which was 0.84 Ω and 0.6 Ω for LDs with p-GaN thicknesses of 650 nm and 250 nm, respectively, as extrapolated from a linear fit to the high current region of the I-V curves. We also carried out three terminal I-V measurements in which current was forced between a top 40 µm diameter circular anode contact and the bottom common cathode contact while the p-GaN free surface voltage adjacent to the anode was simultaneously sensed. To minimize the voltage drop across the p-GaN spreading resistance, the sensing probe was carefully positioned about 2 µm away from the top pad for all of the measurements. Separate measurements on the 250 nm thick p-GaN sample showed that at 7 kA/cm² the voltage drop between the top pad and the p-GaN increased from 0.84 V to 1.63 V as the sensing probe was moved from 2 µm to 18 µm from the pad edge. At 2 µm, the estimated error is 67 mV. The results are shown in Figs. 3(a) and 3(b) for LDs with p-GaN thicknesses of 650 nm and 250 nm, respectively. Surprisingly, both the bulk voltage (dashed lines in Figs. 3(a) and 3(b)) and the voltage across the p-GaN contact (the voltage difference between the solid and dashed lines) decreased with the reduction of p-GaN thickness. Comparing the two samples at 7 kA/cm², the contribution of the semiconductor structure to the excess voltage (above the 2.89 eV photon energy) dropped from 2.3 V to 1.5 V and the p-GaN contact excess voltage dropped from 1.5 V to 0.84 V.

 

Fig. 3 Three-probe current voltage measurement results for LDs with p-GaN thicknesses of 650 nm (a) and 250 nm (b). The insert shows the schematic configuration of the top, sense and common probes. As p-GaN thickness is thinned, both the semiconductor voltage (sense) and the contact voltage (top minus sense) decreased. At high current densities, the apparent contact resistances also monotonically decrease to the low 10⁻⁴ Ωcm² range.

Download Full Size | PDF

From this data it is apparent that the thinner p-GaN benefits the operating voltage. What is more interesting in these results is that the apparent contact resistance, which is the voltage drop across the contact divided by the current, is not a constant parameter and significantly decreases with current. As shown in Figs. 3(a) and 3(b), at 7 kA/cm² the apparent contact resistivity drops to 1.2x10⁻⁴ Ωcm² for the LDs with 250 nm p-GaN and to 2.1x10⁻⁴ Ωcm² for the LDs with 650 nm p-GaN. These values are much lower than previously reported CTLM data of ITO/p-GaN contact resistance on semipolar substrates [23]. However, it should be noted that our three-probe measurements differ from CTLM measurements that we carried out on the same samples at very low voltages, which showed contact resistances of 6.6x10⁻³ Ωcm² and 1.8x10⁻³ Ωcm² for the 650 nm and 250 nm thick p-GaN samples, respectively. One possible explanation is that at the higher bias used in the three probe measurement, the Schottky barrier becomes thinner so that tunneling probability increases. The temperature rise during CW operation should enhance thermally assisted tunneling as well. A full understanding of this contact behavior requires numerical modeling and a few essential parameters, such as the Schottky barrier height and the ionized acceptor concertation near the contact, which is beyond the scope of this paper. Nevertheless, our findings suggest that previous [23] conventional low voltage TLM measurements might overestimated p-GaN contact resistance performance at high power operation.

We next examined the LDs light output characteristics. The semipolar planes of GaN are projected to offer a much higher light output compared to c-plane, especially in longer wavelengths [11,24]. We focus here on the semipolar $(20\overline{2}\overline{1})$ plane with “gallium-like” face as this plane has a higher indium incorporation in the active region compared to the ($20\overline{2}\overline{1})$ plane with “nitrogen-like” face [14]. In addition, the combined effect of the polarization field and the junction’s built-in field results in a smaller electrical field in the QW on the $(20\overline{2}\overline{1})$ plane compared to the ($20\overline{2}\overline{1})$ plane, which result in a very little blue shift with increasing current density in the semipolar ($20\overline{2}\overline{1})$ plane [15].

Typical light output power-current-voltage (L-I-V) curves of 8 µm wide by 900 µm long LDs with p-GaN thicknesses of 650 nm and 250 nm are compared in Fig. 4, as measured from only one of the two uncoated facets. Under pulse operation, Fig. 4(a), the light output power of the two LDs was comparable. A low threshold current density (J_th) of 2.2 kA/cm² and a differential efficiency (η_d) of 33% were measured (assuming equal power from each facet). However, in CW operation, the temperature rise of the ITO/250-nm-p-GaN LDs was much lower than LDs with conventional 650 nm thick p-GaN. The peak light output power was increased from about 0.55 W per facet with 650 nm p-GaN to about 0.76 W per facet with 250 nm p-GaN, as a result of the higher current capability before thermal rollover of the thinned p-GaN LDs.

 

Fig. 4 Light-current-voltage characteristics under pulse (a) and CW (b) operation of 8 µm x 900 µm LDs with 650 nm and 250 nm p-GaN thicknesses. Light output was measured from one of the two uncoated facets. In pulsed mode, comparable light output power was measured for both LDs, but in CW LDs with 250 nm p-GaN had 40% increased peak light output power.

Download Full Size | PDF

A further IR thermography mapping analysis of the LDs was performed to confirm the improved thermal performance of the thinned p-GaN LDs. Following an emissivity calibration at 30°C, the LDs’ temperature map was recorded during a CW drive current of 1 A (14 kA/cm²). As shown in Fig. 5, the average temperature along the ridge decreased from 85°C for the LD with 650 nm p-GaN to 58°C for the LD with 250 nm p-GaN. This temperature is much lower than the previously reported [25] peak temperature of 70°C for c-plane blue LDs mounted on a submount and tested at drive current of 0.1A (6.2 kA/cm²). Our result thus demonstrates that in our thin p-GaN LDs much less heat must be dissipated by external means and higher optical power can be obtained.

 

Fig. 5 Infrared thermography of 8 µm x 900 µm LDs with 650 nm and 250 nm p-GaN thicknesses at a CW drive current of 1 A measured using two top probes. (a) Temperature map of LDs with 250 nm p-GaN (left) and 650 nm p-GaN (right). A microscope image shows the scanned area. (b) Temperature profile along a diagonal line between points A and B showing an average laser ridge temperature of 85°C for LD with 650 nm p-GaN and 58°C for LD with 250 nm p-GaN.

Download Full Size | PDF

A careful examination of the LDs’ differential efficiency across the wafers was performed to evaluate the impact of the thinner p-GaN layer on excess optical modal loss in the ITO. As shown in Fig. 6, the differential efficiencies of the LDs with 650 nm p-GaN were slightly higher than the LDs with 250 nm p-GaN. This suggest some modal overlap with the ITO, which has a high material optical loss [16,17].

 

Fig. 6 Differential efficiencies of the LDs with 650 nm and 250 nm p-GaN across the wafers. With 250 nm p-GaN slightly lower differential efficiencies were recorded, suggesting very small optical modal loss in the ITO is introduced with 250 nm p-GaN.

Download Full Size | PDF

To further examine the tradeoff between lower operating voltage and increased optical modal loss with p-GaN thickness reduction, we processed another set of LDs consisting of p-GaN cladding thicknesses of 250 nm and 150 nm lasing at 445 nm. In addition, to improve the differential efficiency, bulk related optical loss due to high doping levels [26] were minimized by introducing uniform lower Si-doping of 1x10¹⁸ cm⁻³ across the n-GaN template and the n-In_0.07Ga_0.93N waveguide layers. Figure 7(a) compares the L-I-V curves of typical 8 µm by 1200 µm LDs with 250 nm and 150 nm p-GaN thickness under CW operation.

 

Fig. 7 (a) CW light-current-voltage characteristics of 8 µm x 1200 µm LDs with p-GaN thicknesses of 250 nm and 150 nm and lower Si doping. As the p-GaN is thinned from 250 nm to 150 nm, the voltage continues to drop but the differential efficiency also begins to drop. (b) Comparison of differential efficiencies for LDs with 250 nm and 150 nm p-GaN thicknesses and low and high Si doping levels. Lowering Si doping level increased the differential efficiencies.

Download Full Size | PDF

We first find, as expected, a further reduction in operating voltage of about 0.6 V at 10 kA/cm² by thinning down p-GaN thickness from 250 nm to 150 nm. However, the absolute operating voltage of these set of LDs increased compared to the LDs with higher Si-doping levels. This implies that a voltage penalty is associated with lowering the Si doping levels across the n-type layers. Secondly, we find that as the p-GaN is thinned from 250 nm to 150 nm the differential efficiency also begins to drop as a result of optical mode penetration into the ITO confirming the aforementioned tradeoff behavior.

This reduction in differential efficiency was recorded across the wafers and is depicted in Fig. 7(b), which shows the differential efficiencies of LDs with p-GaN thickness of 250 nm and 150 nm. Yet, incorporating lower Si doping levels substantially improved the light output power. With low Si doping across the n-layers, differential efficiencies as high as 50% were measured for LDs with 250 nm p-GaN, and 42% for LDs with 150 nm p-GaN. As shown in Fig. 7(a), for LD with 250 nm p-GaN at 0.96 A (10 kA/cm²) a WPE of 15% was obtained. A peak light output power of 2.2 W was also achieved before rollover (assuming equal power from each facet).

4. Summary and conclusions

We have successfully demonstrated enhanced CW operation of blue emitting LDs on semipolar $(20\overline{2}\overline{1})$ GaN substrates by incorporating ITO/thin-p-GaN cladding layers. We have shown a tradeoff between operating voltage and optical modal loss as a function of p-GaN thickness, with an optimal thickness of 250 nm. Finally, we demonstrated LDs lasing at 445 nm with peak optical output power of 2.2 W and WPE of 15%, consisting of ITO/250-nm-p-GaN p-cladding layers and low Si-doped n-type layers. Our findings suggest that with a lower absorption TCO, such as ZnO, LDs performance could be further enhanced.